summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/ARMInstrInfo.td
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrInfo.td')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td11
1 files changed, 6 insertions, 5 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index b43678080c0..6ff4bbb308c 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -285,16 +285,17 @@ def bltarget : Operand<i32> {
}
// A list of registers separated by comma. Used by load/store multiple.
-def reglist : Operand<i32> {
- string EncoderMethod = "getRegisterListOpValue";
- let PrintMethod = "printRegisterList";
-}
-
def RegListAsmOperand : AsmOperandClass {
let Name = "RegList";
let SuperClasses = [];
}
+def reglist : Operand<i32> {
+ string EncoderMethod = "getRegisterListOpValue";
+ let ParserMatchClass = RegListAsmOperand;
+ let PrintMethod = "printRegisterList";
+}
+
// An operand for the CONSTPOOL_ENTRY pseudo-instruction.
def cpinst_operand : Operand<i32> {
let PrintMethod = "printCPInstOperand";
OpenPOWER on IntegriCloud