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-rw-r--r--llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 2714dd256db..109ec0c4478 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -763,6 +763,21 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
break;
}
+ case ARM::t2LEApcrel:
+ case ARM::t2LEApcrelJT: {
+ bool DstIsDead = MI.getOperand(0).isDead();
+ MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
+ TII->get(ARM::t2ADR))
+ .addReg(MI.getOperand(0).getReg(),
+ RegState::Define | getDeadRegState(DstIsDead)) // Dst reg
+ .addOperand(MI.getOperand(1)) // Label
+ .addOperand(MI.getOperand(2)) // Pred
+ .addOperand(MI.getOperand(3));
+ TransferImpOps(MI, MIB, MIB);
+ MI.eraseFromParent();
+ return MIB;
+ }
+
case ARM::MOVi32imm:
case ARM::MOVCCi32imm:
case ARM::t2MOVi32imm:
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