diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMCodeEmitter.cpp | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp index a8fe2ea4f19..13f7903402e 100644 --- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp @@ -392,14 +392,11 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI, // Encode first non-shifter register operand if there is one. unsigned Format = TID.TSFlags & ARMII::FormMask; - bool isUnary = (Format == ARMII::DPRdMisc || - Format == ARMII::DPRdIm || - Format == ARMII::DPRdReg || - Format == ARMII::DPRdSoReg || - Format == ARMII::DPRnIm || - Format == ARMII::DPRnReg || - Format == ARMII::DPRnSoReg); - if (!isUnary) { + bool hasRnOperand= !(Format == ARMII::DPRdMisc || + Format == ARMII::DPRdIm || + Format == ARMII::DPRdReg || + Format == ARMII::DPRdSoReg); + if (hasRnOperand) { Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift; ++OpIdx; } |

