diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 4 |
3 files changed, 6 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp index bba92c32195..3c5c188fdc1 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp @@ -47,8 +47,7 @@ static bool isCBranchSCC(const SDNode *N) { if (Cond.getOpcode() == ISD::CopyToReg) Cond = Cond.getOperand(2); return Cond.getOpcode() == ISD::SETCC && - Cond.getOperand(0).getValueType() == MVT::i32 && - Cond.hasOneUse(); + Cond.getOperand(0).getValueType() == MVT::i32 && Cond.hasOneUse(); } /// AMDGPU specific code to select AMDGPU machine instructions for @@ -619,9 +618,8 @@ bool AMDGPUDAGToDAGISel::isGlobalLoad(const MemSDNode *N) const { return false; if (N->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS) { if (Subtarget->getGeneration() < AMDGPUSubtarget::SOUTHERN_ISLANDS) - return !isa<GlobalValue>( - GetUnderlyingObject(N->getMemOperand()->getValue(), - CurDAG->getDataLayout())); + return !isa<GlobalValue>(GetUnderlyingObject( + N->getMemOperand()->getValue(), CurDAG->getDataLayout())); //TODO: Why do we need this? if (N->getMemoryVT().bitsLT(MVT::i32)) diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 7bbbacdf5a7..7fc94911d13 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -656,8 +656,7 @@ SDValue SITargetLowering::LowerFormalArguments( // enabled too. if (CallConv == CallingConv::AMDGPU_PS && ((Info->getPSInputAddr() & 0x7F) == 0 || - ((Info->getPSInputAddr() & 0xF) == 0 && - Info->isPSInputAllocated(11)))) { + ((Info->getPSInputAddr() & 0xF) == 0 && Info->isPSInputAllocated(11)))) { CCInfo.AllocateReg(AMDGPU::VGPR0); CCInfo.AllocateReg(AMDGPU::VGPR1); Info->markPSInputAllocated(0); diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 850826d74cc..7e64cbe11ee 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -300,8 +300,8 @@ bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, bool SIInstrInfo::shouldClusterMemOps(MachineInstr *FirstLdSt, MachineInstr *SecondLdSt, unsigned NumLoads) const { - const MachineOperand *FirstDst = nullptr; - const MachineOperand *SecondDst = nullptr; + const MachineOperand *FirstDst = nullptr; + const MachineOperand *SecondDst = nullptr; if (isDS(*FirstLdSt) && isDS(*SecondLdSt)) { FirstDst = getNamedOperand(*FirstLdSt, AMDGPU::OpName::vdst); |
