2 files changed, 17 insertions, 24 deletions

diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index fa84f1cb261..abf71e3aab9 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -228,6 +228,11 @@ public:
     return isClamp() || isOMod();
   }
 
+  bool isGDS() const { return isImmTy(ImmTyGDS); }
+  bool isGLC() const { return isImmTy(ImmTyGLC); }
+  bool isSLC() const { return isImmTy(ImmTySLC); }
+  bool isTFE() const { return isImmTy(ImmTyTFE); }
+
   void setModifiers(unsigned Mods) {
     assert(isReg() || (isImm() && Imm.Modifiers == 0));
     if (isReg())
@@ -1732,7 +1737,7 @@ AMDGPUAsmParser::parseTFE(OperandVector &Operands) {
 }
 
 bool AMDGPUOperand::isMubufOffset() const {
-  return isImm() && isUInt<12>(getImm());
+  return isImmTy(ImmTyOffset) && isUInt<12>(getImm());
 }
 
 void AMDGPUAsmParser::cvtMubuf(MCInst &Inst,
@@ -1933,38 +1938,26 @@ void AMDGPUAsmParser::cvtVOP3_only(MCInst &Inst, const OperandVector &Operands)
 }
 
 void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) {
+  OptionalImmIndexMap OptionalIdx;
   unsigned I = 1;
   const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
   for (unsigned J = 0; J < Desc.getNumDefs(); ++J) {
     ((AMDGPUOperand &)*Operands[I++]).addRegOperands(Inst, 1);
   }
 
-  unsigned ClampIdx = 0, OModIdx = 0;
   for (unsigned E = Operands.size(); I != E; ++I) {
     AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]);
     if (Op.isRegOrImmWithInputMods()) {
       Op.addRegOrImmWithInputModsOperands(Inst, 2);
-    } else if (Op.isClamp()) {
-      ClampIdx = I;
-    } else if (Op.isOMod()) {
-      OModIdx = I;
+    } else if (Op.isImm()) {
+      OptionalIdx[Op.getImmTy()] = I;
     } else {
       assert(false);
     }
   }
 
-  if (ClampIdx) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[ClampIdx]);
-    Op.addImmOperands(Inst, 1);
-  } else {
-    Inst.addOperand(MCOperand::createImm(0));
-  }
-  if (OModIdx) {
-    AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[OModIdx]);
-    Op.addImmOperands(Inst, 1);
-  } else {
-    Inst.addOperand(MCOperand::createImm(0));
-  }
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyClamp);
+  addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOMod);
 }
 
 void AMDGPUAsmParser::cvtMIMG(MCInst &Inst, const OperandVector &Operands) {
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index eda6223d001..9e3cc81a29f 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -463,7 +463,7 @@ def DSOffset01MatchClass : AsmOperandClass {
 
 class GDSBaseMatchClass <string parser> : AsmOperandClass {
   let Name = "GDS"#parser;
-  let PredicateMethod = "isImm";
+  let PredicateMethod = "isGDS";
   let ParserMethod = parser;
   let RenderMethod = "addImmOperands";
   let IsOptional = 1;
@@ -474,7 +474,7 @@ def GDS01MatchClass : GDSBaseMatchClass <"parseDSOff01OptionalOps">;
 
 class GLCBaseMatchClass <string parser> : AsmOperandClass {
   let Name = "GLC"#parser;
-  let PredicateMethod = "isImm";
+  let PredicateMethod = "isGLC";
   let ParserMethod = parser;
   let RenderMethod = "addImmOperands";
   let IsOptional = 1;
@@ -485,7 +485,7 @@ def GLCFlatMatchClass : GLCBaseMatchClass <"parseFlatOptionalOps">;
 
 class SLCBaseMatchClass <string parser> : AsmOperandClass {
   let Name = "SLC"#parser;
-  let PredicateMethod = "isImm";
+  let PredicateMethod = "isSLC";
   let ParserMethod = parser;
   let RenderMethod = "addImmOperands";
   let IsOptional = 1;
@@ -497,7 +497,7 @@ def SLCFlatAtomicMatchClass : SLCBaseMatchClass <"parseFlatAtomicOptionalOps">;
 
 class TFEBaseMatchClass <string parser> : AsmOperandClass {
   let Name = "TFE"#parser;
-  let PredicateMethod = "isImm";
+  let PredicateMethod = "isTFE";
   let ParserMethod = parser;
   let RenderMethod = "addImmOperands";
   let IsOptional = 1;
@@ -509,7 +509,7 @@ def TFEFlatAtomicMatchClass : TFEBaseMatchClass <"parseFlatAtomicOptionalOps">;
 
 def OModMatchClass : AsmOperandClass {
   let Name = "OMod";
-  let PredicateMethod = "isImm";
+  let PredicateMethod = "isOMod";
   let ParserMethod = "parseVOP3OptionalOps";
   let RenderMethod = "addImmOperands";
   let IsOptional = 1;
@@ -517,7 +517,7 @@ def OModMatchClass : AsmOperandClass {
 
 def ClampMatchClass : AsmOperandClass {
   let Name = "Clamp";
-  let PredicateMethod = "isImm";
+  let PredicateMethod = "isClamp";
   let ParserMethod = "parseVOP3OptionalOps";
   let RenderMethod = "addImmOperands";
   let IsOptional = 1;