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-rw-r--r--llvm/lib/Target/AMDGPU/SIInstructions.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index bdc6e13cb8b..ad45df0d902 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -430,7 +430,7 @@ def S_ENDPGM : SOPP <0x00000001, (ins), "s_endpgm",
let hasSideEffects = 1;
}
-let isBranch = 1 in {
+let isBranch = 1, SchedRW = [WriteBranch] in {
def S_BRANCH : SOPP <
0x00000002, (ins sopp_brtarget:$simm16), "s_branch $simm16",
[(br bb:$simm16)]> {
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