diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/VOP3Instructions.td')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP3Instructions.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index 736c6a5c449..aa041aab51c 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -450,17 +450,17 @@ let Predicates = [Has16BitInsts] in { multiclass Ternary_i16_Pats <SDPatternOperator op1, SDPatternOperator op2, Instruction inst, SDPatternOperator op3> { -def : Pat< +def : GCNPat < (op2 (op1 i16:$src0, i16:$src1), i16:$src2), (inst i16:$src0, i16:$src1, i16:$src2, (i1 0)) >; -def : Pat< +def : GCNPat< (i32 (op3 (op2 (op1 i16:$src0, i16:$src1), i16:$src2))), (inst i16:$src0, i16:$src1, i16:$src2, (i1 0)) >; -def : Pat< +def : GCNPat< (i64 (op3 (op2 (op1 i16:$src0, i16:$src1), i16:$src2))), (REG_SEQUENCE VReg_64, (inst i16:$src0, i16:$src1, i16:$src2, (i1 0)), sub0, @@ -528,7 +528,7 @@ class getClampRes<VOPProfile P, Instruction inst> { ret1)); } -class IntClampPat<VOP3Inst inst, SDPatternOperator node> : Pat< +class IntClampPat<VOP3Inst inst, SDPatternOperator node> : GCNPat< getClampPat<inst.Pfl, node>.ret, getClampRes<inst.Pfl, inst>.ret >; |
