summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
index ba616ada0c9..3880d052bf8 100644
--- a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
@@ -121,11 +121,14 @@ bool SILowerI1Copies::runOnMachineFunction(MachineFunction &MF) {
}
}
+ unsigned int TmpSrc = MRI.createVirtualRegister(&AMDGPU::SReg_64_XEXECRegClass);
+ BuildMI(MBB, &MI, DL, TII->get(AMDGPU::COPY), TmpSrc)
+ .add(Src);
BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64))
.add(Dst)
.addImm(0)
.addImm(-1)
- .add(Src);
+ .addReg(TmpSrc);
MI.eraseFromParent();
} else if (TRI->getCommonSubClass(DstRC, &AMDGPU::SGPR_64RegClass) &&
SrcRC == &AMDGPU::VReg_1RegClass) {
OpenPOWER on IntegriCloud