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-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrInfo.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index b6e1a9cbf6a..9068c177878 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -484,6 +484,8 @@ void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
int Opcode = -1;
if (RI.isSGPRClass(RC)) {
+ MFI->setHasSpilledSGPRs();
+
// We are only allowed to create one new instruction when spilling
// registers, so we need to use pseudo instruction for spilling
// SGPRs.
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