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-rw-r--r--llvm/lib/Target/AMDGPU/SIFrameLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index 08a7419612b..89bb98dbd02 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -394,7 +394,7 @@ void SIFrameLowering::emitEntryFunctionScratchSetup(const SISubtarget &ST,
// We now have the GIT ptr - now get the scratch descriptor from the entry
// at offset 0.
PointerType *PtrTy =
- PointerType::get(Type::getInt64Ty(MF.getFunction()->getContext()),
+ PointerType::get(Type::getInt64Ty(MF.getFunction().getContext()),
AMDGPUAS::CONSTANT_ADDRESS);
MachinePointerInfo PtrInfo(UndefValue::get(PtrTy));
const MCInstrDesc &LoadDwordX4 = TII->get(AMDGPU::S_LOAD_DWORDX4_IMM);
@@ -425,7 +425,7 @@ void SIFrameLowering::emitEntryFunctionScratchSetup(const SISubtarget &ST,
if (MFI->hasImplicitBufferPtr()) {
unsigned Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);
- if (AMDGPU::isCompute(MF.getFunction()->getCallingConv())) {
+ if (AMDGPU::isCompute(MF.getFunction().getCallingConv())) {
const MCInstrDesc &Mov64 = TII->get(AMDGPU::S_MOV_B64);
BuildMI(MBB, I, DL, Mov64, Rsrc01)
@@ -435,7 +435,7 @@ void SIFrameLowering::emitEntryFunctionScratchSetup(const SISubtarget &ST,
const MCInstrDesc &LoadDwordX2 = TII->get(AMDGPU::S_LOAD_DWORDX2_IMM);
PointerType *PtrTy =
- PointerType::get(Type::getInt64Ty(MF.getFunction()->getContext()),
+ PointerType::get(Type::getInt64Ty(MF.getFunction().getContext()),
AMDGPUAS::CONSTANT_ADDRESS);
MachinePointerInfo PtrInfo(UndefValue::get(PtrTy));
auto MMO = MF.getMachineMemOperand(PtrInfo,
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