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-rw-r--r--llvm/lib/Target/AMDGPU/R600InstrFormats.td14
1 files changed, 12 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600InstrFormats.td b/llvm/lib/Target/AMDGPU/R600InstrFormats.td
index 68fcc545916..61106ed42e6 100644
--- a/llvm/lib/Target/AMDGPU/R600InstrFormats.td
+++ b/llvm/lib/Target/AMDGPU/R600InstrFormats.td
@@ -11,9 +11,18 @@
//
//===----------------------------------------------------------------------===//
+def isR600 : Predicate<"Subtarget->getGeneration() <= R600Subtarget::R700">;
+
+def isR600toCayman : Predicate<
+ "Subtarget->getGeneration() <= R600Subtarget::NORTHERN_ISLANDS">;
+
+class R600Pat<dag pattern, dag result> : AMDGPUPat<pattern, result> {
+ let SubtargetPredicate = isR600toCayman;
+}
+
class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
- InstrItinClass itin>
- : AMDGPUInst <outs, ins, asm, pattern> {
+ InstrItinClass itin = NoItinerary>
+ : AMDGPUInst <outs, ins, asm, pattern>, PredicateControl {
field bits<64> Inst;
bit Trig = 0;
@@ -31,6 +40,7 @@ class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
bit IsExport = 0;
bit LDS_1A2D = 0;
+ let SubtargetPredicate = isR600toCayman;
let Namespace = "AMDGPU";
let OutOperandList = outs;
let InOperandList = ins;
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