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-rw-r--r--llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp31
1 files changed, 18 insertions, 13 deletions
diff --git a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
index 02914c9f1ee..a11e20bf046 100644
--- a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
@@ -631,40 +631,45 @@ void AMDGPUInstPrinter::printOperandAndIntInputMods(const MCInst *MI,
void AMDGPUInstPrinter::printDPPCtrl(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI,
raw_ostream &O) {
+ using namespace AMDGPU::DPP;
+
unsigned Imm = MI->getOperand(OpNo).getImm();
- if (Imm <= 0x0ff) {
+ if (Imm <= DppCtrl::QUAD_PERM_LAST) {
O << " quad_perm:[";
O << formatDec(Imm & 0x3) << ',';
O << formatDec((Imm & 0xc) >> 2) << ',';
O << formatDec((Imm & 0x30) >> 4) << ',';
O << formatDec((Imm & 0xc0) >> 6) << ']';
- } else if ((Imm >= 0x101) && (Imm <= 0x10f)) {
+ } else if ((Imm >= DppCtrl::ROW_SHL_FIRST) &&
+ (Imm <= DppCtrl::ROW_SHL_LAST)) {
O << " row_shl:";
printU4ImmDecOperand(MI, OpNo, O);
- } else if ((Imm >= 0x111) && (Imm <= 0x11f)) {
+ } else if ((Imm >= DppCtrl::ROW_SHR_FIRST) &&
+ (Imm <= DppCtrl::ROW_SHR_LAST)) {
O << " row_shr:";
printU4ImmDecOperand(MI, OpNo, O);
- } else if ((Imm >= 0x121) && (Imm <= 0x12f)) {
+ } else if ((Imm >= DppCtrl::ROW_ROR_FIRST) &&
+ (Imm <= DppCtrl::ROW_ROR_LAST)) {
O << " row_ror:";
printU4ImmDecOperand(MI, OpNo, O);
- } else if (Imm == 0x130) {
+ } else if (Imm == DppCtrl::WAVE_SHL1) {
O << " wave_shl:1";
- } else if (Imm == 0x134) {
+ } else if (Imm == DppCtrl::WAVE_ROL1) {
O << " wave_rol:1";
- } else if (Imm == 0x138) {
+ } else if (Imm == DppCtrl::WAVE_SHR1) {
O << " wave_shr:1";
- } else if (Imm == 0x13c) {
+ } else if (Imm == DppCtrl::WAVE_ROR1) {
O << " wave_ror:1";
- } else if (Imm == 0x140) {
+ } else if (Imm == DppCtrl::ROW_MIRROR) {
O << " row_mirror";
- } else if (Imm == 0x141) {
+ } else if (Imm == DppCtrl::ROW_HALF_MIRROR) {
O << " row_half_mirror";
- } else if (Imm == 0x142) {
+ } else if (Imm == DppCtrl::BCAST15) {
O << " row_bcast:15";
- } else if (Imm == 0x143) {
+ } else if (Imm == DppCtrl::BCAST31) {
O << " row_bcast:31";
} else {
- llvm_unreachable("Invalid dpp_ctrl value");
+ O << " /* Invalid dpp_ctrl value */";
}
}
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