diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/GCNRegPressure.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp index be01988b6bc..39460fbd8a8 100644 --- a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp +++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp @@ -89,7 +89,9 @@ unsigned GCNRegPressure::getRegKind(unsigned Reg, auto STI = static_cast<const SIRegisterInfo*>(MRI.getTargetRegisterInfo()); return STI->isSGPRClass(RC) ? (STI->getRegSizeInBits(*RC) == 32 ? SGPR32 : SGPR_TUPLE) : - (STI->getRegSizeInBits(*RC) == 32 ? VGPR32 : VGPR_TUPLE); + STI->hasAGPRs(RC) ? + (STI->getRegSizeInBits(*RC) == 32 ? AGPR32 : AGPR_TUPLE) : + (STI->getRegSizeInBits(*RC) == 32 ? VGPR32 : VGPR_TUPLE); } void GCNRegPressure::inc(unsigned Reg, @@ -110,16 +112,18 @@ void GCNRegPressure::inc(unsigned Reg, switch (auto Kind = getRegKind(Reg, MRI)) { case SGPR32: case VGPR32: + case AGPR32: assert(PrevMask.none() && NewMask == MaxMask); Value[Kind] += Sign; break; case SGPR_TUPLE: case VGPR_TUPLE: + case AGPR_TUPLE: assert(NewMask < MaxMask || NewMask == MaxMask); assert(PrevMask < NewMask); - Value[Kind == SGPR_TUPLE ? SGPR32 : VGPR32] += + Value[Kind == SGPR_TUPLE ? SGPR32 : Kind == AGPR_TUPLE ? AGPR32 : VGPR32] += Sign * (~PrevMask & NewMask).getNumLanes(); if (PrevMask.none()) { |
