diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 53 |
1 files changed, 39 insertions, 14 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index de8147d093f..283de3b31da 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -14,6 +14,7 @@ #include "AMDGPU.h" #include "AMDGPULegalizerInfo.h" +#include "AMDGPUTargetMachine.h" #include "llvm/CodeGen/TargetOpcodes.h" #include "llvm/CodeGen/ValueTypes.h" #include "llvm/IR/DerivedTypes.h" @@ -27,12 +28,19 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST, const GCNTargetMachine &TM) { using namespace TargetOpcode; - const LLT S1= LLT::scalar(1); + auto GetAddrSpacePtr = [&TM](unsigned AS) { + return LLT::pointer(AS, TM.getPointerSizeInBits(AS)); + }; + + const LLT S1 = LLT::scalar(1); const LLT V2S16 = LLT::vector(2, 16); + const LLT S32 = LLT::scalar(32); const LLT S64 = LLT::scalar(64); - const LLT P1 = LLT::pointer(AMDGPUAS::GLOBAL_ADDRESS, 64); - const LLT P2 = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); + + const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS); + const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS); + setAction({G_ADD, S32}, Legal); setAction({G_MUL, S32}, Legal); @@ -76,26 +84,45 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST, setAction({G_FPTOUI, S32}, Legal); setAction({G_FPTOUI, 1, S32}, Legal); - setAction({G_GEP, P1}, Legal); - setAction({G_GEP, P2}, Legal); + setAction({G_GEP, GlobalPtr}, Legal); + setAction({G_GEP, ConstantPtr}, Legal); setAction({G_GEP, 1, S64}, Legal); setAction({G_ICMP, S1}, Legal); setAction({G_ICMP, 1, S32}, Legal); - setAction({G_LOAD, P1}, Legal); - setAction({G_LOAD, P2}, Legal); - setAction({G_LOAD, S32}, Legal); - setAction({G_LOAD, 1, P1}, Legal); - setAction({G_LOAD, 1, P2}, Legal); + + getActionDefinitionsBuilder({G_LOAD, G_STORE}) + .legalIf([=, &ST](const LegalityQuery &Query) { + const LLT &Ty0 = Query.Types[0]; + + // TODO: Decompose private loads into 4-byte components. + // TODO: Illegal flat loads on SI + switch (Ty0.getSizeInBits()) { + case 32: + case 64: + case 128: + return true; + + case 96: + // XXX hasLoadX3 + return (ST.getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS); + + case 256: + case 512: + // TODO: constant loads + default: + return false; + } + }); + + setAction({G_SELECT, S32}, Legal); setAction({G_SELECT, 1, S1}, Legal); setAction({G_SHL, S32}, Legal); - setAction({G_STORE, S32}, Legal); - setAction({G_STORE, 1, P1}, Legal); // FIXME: When RegBankSelect inserts copies, it will only create new // registers with scalar types. This means we can end up with @@ -104,8 +131,6 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST, // if it sees a generic instruction which isn't legal, so we need to // tell it that scalar types are legal for pointer operands setAction({G_GEP, S64}, Legal); - setAction({G_LOAD, 1, S64}, Legal); - setAction({G_STORE, 1, S64}, Legal); for (unsigned Op : {G_EXTRACT_VECTOR_ELT, G_INSERT_VECTOR_ELT}) { getActionDefinitionsBuilder(Op) |
