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-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 0d02e738b4b..f916154c319 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -116,6 +116,10 @@ bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {
return RBI.constrainGenericRegister(DstReg, *RC, MRI);
}
+ // TODO: Should probably leave the copy and let copyPhysReg expand it.
+ if (!RBI.constrainGenericRegister(DstReg, *TRI.getBoolRC(), MRI))
+ return false;
+
BuildMI(*BB, &I, DL, TII.get(AMDGPU::V_CMP_NE_U32_e64), DstReg)
.addImm(0)
.addReg(SrcReg);
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