diff options
Diffstat (limited to 'llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp index dc1cf368f8e..10f01f4188d 100644 --- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp +++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp @@ -219,11 +219,6 @@ static DecodeStatus DecodeImm8OptLsl(MCInst &Inst, unsigned Imm, static DecodeStatus DecodeSVEIncDecImm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder); -static DecodeStatus DecodeLoadAllocTagArrayInstruction(MCInst &Inst, - uint32_t insn, - uint64_t address, - const void* Decoder); - static bool Check(DecodeStatus &Out, DecodeStatus In) { switch (In) { case MCDisassembler::Success: @@ -1851,25 +1846,3 @@ static DecodeStatus DecodeSVEIncDecImm(MCInst &Inst, unsigned Imm, Inst.addOperand(MCOperand::createImm(Imm + 1)); return Success; } - -static DecodeStatus DecodeLoadAllocTagArrayInstruction(MCInst &Inst, - uint32_t insn, - uint64_t address, - const void* Decoder) { - unsigned Rn = fieldFromInstruction(insn, 5, 5); - unsigned Rt = fieldFromInstruction(insn, 0, 5); - - // Outputs - DecodeGPR64spRegisterClass(Inst, Rn, address, Decoder); - DecodeGPR64RegisterClass(Inst, Rt, address, Decoder); - - // Input (Rn again) - Inst.addOperand(Inst.getOperand(0)); - - //Do this post decode since the raw number for xzr and sp is the same - if (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg()) { - return SoftFail; - } else { - return Success; - } -} |
