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Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64Subtarget.h')
-rw-r--r--llvm/lib/Target/AArch64/AArch64Subtarget.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h
index 6d26fa71c79..43d4141aadf 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -86,6 +86,8 @@ protected:
uint16_t PrefetchDistance = 0;
uint16_t MinPrefetchStride = 1;
unsigned MaxPrefetchIterationsAhead = UINT_MAX;
+ unsigned PrefFunctionAlignment = 0;
+ unsigned PrefLoopAlignment = 0;
// ReserveX18 - X18 is not available as a general purpose register.
bool ReserveX18;
@@ -195,6 +197,8 @@ public:
unsigned getMaxPrefetchIterationsAhead() const {
return MaxPrefetchIterationsAhead;
}
+ unsigned getPrefFunctionAlignment() const { return PrefFunctionAlignment; }
+ unsigned getPrefLoopAlignment() const { return PrefLoopAlignment; }
/// CPU has TBI (top byte of addresses is ignored during HW address
/// translation) and OS enables it.
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