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Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp
index 4bb0f8d530f..adda760cb1d 100644
--- a/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MachineLegalizer.cpp
@@ -176,6 +176,7 @@ AArch64MachineLegalizer::AArch64MachineLegalizer() {
setAction({G_INTTOPTR, 0, p0}, Legal);
setAction({G_INTTOPTR, 1, s64}, Legal);
+ // Casts for 32 and 64-bit width type are just copies.
for (auto Ty : {s1, s8, s16, s32, s64}) {
setAction({G_BITCAST, 0, Ty}, Legal);
setAction({G_BITCAST, 1, Ty}, Legal);
@@ -183,10 +184,12 @@ AArch64MachineLegalizer::AArch64MachineLegalizer() {
for (int EltSize = 8; EltSize <= 64; EltSize *= 2) {
setAction({G_BITCAST, 0, LLT::vector(128/EltSize, EltSize)}, Legal);
+ setAction({G_BITCAST, 1, LLT::vector(128/EltSize, EltSize)}, Legal);
if (EltSize == 64)
continue;
setAction({G_BITCAST, 0, LLT::vector(64/EltSize, EltSize)}, Legal);
+ setAction({G_BITCAST, 1, LLT::vector(64/EltSize, EltSize)}, Legal);
}
computeTables();
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