diff options
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64ISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 2b613e14050..33e20128e8c 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -721,18 +721,12 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM, } void AArch64TargetLowering::addTypeForNEON(MVT VT, MVT PromotedBitwiseVT) { - if (VT == MVT::v2f32 || VT == MVT::v4f16) { - setOperationAction(ISD::LOAD, VT, Promote); - AddPromotedToType(ISD::LOAD, VT, MVT::v2i32); - - setOperationAction(ISD::STORE, VT, Promote); - AddPromotedToType(ISD::STORE, VT, MVT::v2i32); - } else if (VT == MVT::v2f64 || VT == MVT::v4f32 || VT == MVT::v8f16) { - setOperationAction(ISD::LOAD, VT, Promote); - AddPromotedToType(ISD::LOAD, VT, MVT::v2i64); - - setOperationAction(ISD::STORE, VT, Promote); - AddPromotedToType(ISD::STORE, VT, MVT::v2i64); + assert(VT.isVector() && "VT should be a vector type"); + + if (VT.isFloatingPoint()) { + MVT PromoteTo = EVT(VT).changeVectorElementTypeToInteger().getSimpleVT(); + setOperationPromotedToType(ISD::LOAD, VT, PromoteTo); + setOperationPromotedToType(ISD::STORE, VT, PromoteTo); } // Mark vector float intrinsics as expand. |