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Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
index 082e17e44d0..09a525d4b06 100644
--- a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
@@ -110,6 +110,8 @@ bool AArch64ExpandPseudo::expandMOVImm(MachineBasicBlock &MBB,
unsigned BitSize) {
MachineInstr &MI = *MBBI;
Register DstReg = MI.getOperand(0).getReg();
+ uint64_t RenamableState =
+ MI.getOperand(0).isRenamable() ? RegState::Renamable : 0;
uint64_t Imm = MI.getOperand(1).getImm();
if (DstReg == AArch64::XZR || DstReg == AArch64::WZR) {
@@ -144,7 +146,8 @@ bool AArch64ExpandPseudo::expandMOVImm(MachineBasicBlock &MBB,
bool DstIsDead = MI.getOperand(0).isDead();
MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
.addReg(DstReg, RegState::Define |
- getDeadRegState(DstIsDead && LastItem))
+ getDeadRegState(DstIsDead && LastItem) |
+ RenamableState)
.addImm(I->Op1)
.addImm(I->Op2));
} break;
@@ -155,7 +158,8 @@ bool AArch64ExpandPseudo::expandMOVImm(MachineBasicBlock &MBB,
MIBS.push_back(BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(I->Opcode))
.addReg(DstReg,
RegState::Define |
- getDeadRegState(DstIsDead && LastItem))
+ getDeadRegState(DstIsDead && LastItem) |
+ RenamableState)
.addReg(DstReg)
.addImm(I->Op1)
.addImm(I->Op2));
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