diff options
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/LiveIntervalAnalysis.cpp | 20 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineBasicBlock.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineFunction.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp | 2 |
4 files changed, 13 insertions, 15 deletions
diff --git a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp index e7abd47f536..88eeff7605a 100644 --- a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -817,17 +817,15 @@ void LiveIntervals::computeIntervals() { MachineBasicBlock::iterator MI = MBB->begin(), miEnd = MBB->end(); - if (MBB->livein_begin() != MBB->livein_end()) { - // Create intervals for live-ins to this BB first. - for (MachineBasicBlock::const_livein_iterator LI = MBB->livein_begin(), - LE = MBB->livein_end(); LI != LE; ++LI) { - handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*LI)); - // Multiple live-ins can alias the same register. - for (const unsigned* AS = mri_->getSubRegisters(*LI); *AS; ++AS) - if (!hasInterval(*AS)) - handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS), - true); - } + // Create intervals for live-ins to this BB first. + for (MachineBasicBlock::const_livein_iterator LI = MBB->livein_begin(), + LE = MBB->livein_end(); LI != LE; ++LI) { + handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*LI)); + // Multiple live-ins can alias the same register. + for (const unsigned* AS = mri_->getSubRegisters(*LI); *AS; ++AS) + if (!hasInterval(*AS)) + handleLiveInRegister(MBB, MIIndex, getOrCreateInterval(*AS), + true); } for (; MI != miEnd; ++MI) { diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp index 134d2767861..6a8b083be83 100644 --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -119,7 +119,7 @@ void MachineBasicBlock::print(std::ostream &OS) const { OS << ":\n"; const MRegisterInfo *MRI = MF->getTarget().getRegisterInfo(); - if (livein_begin() != livein_end()) { + if (!livein_empty()) { OS << "Live Ins:"; for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I) OutputReg(OS, *I, MRI); diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp index c762ae567c8..ca7468476ad 100644 --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -208,7 +208,7 @@ void MachineFunction::print(std::ostream &OS) const { const MRegisterInfo *MRI = getTarget().getRegisterInfo(); - if (livein_begin() != livein_end()) { + if (!livein_empty()) { OS << "Live Ins:"; for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I) { if (MRI) @@ -221,7 +221,7 @@ void MachineFunction::print(std::ostream &OS) const { } OS << "\n"; } - if (liveout_begin() != liveout_end()) { + if (!liveout_empty()) { OS << "Live Outs:"; for (liveout_iterator I = liveout_begin(), E = liveout_end(); I != E; ++I) if (MRI) diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp index d90accda627..bd5c5983327 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp @@ -866,7 +866,7 @@ void ScheduleDAG::EmitSchedule() { // that need to be copied into vregs, emit the copies into the top of the // block before emitting the code for the block. MachineFunction &MF = DAG.getMachineFunction(); - if (&MF.front() == BB && MF.livein_begin() != MF.livein_end()) { + if (&MF.front() == BB) { for (MachineFunction::livein_iterator LI = MF.livein_begin(), E = MF.livein_end(); LI != E; ++LI) if (LI->second) { |
