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-rw-r--r--llvm/lib/CodeGen/MIRPrinter.cpp14
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp7
-rw-r--r--llvm/lib/CodeGen/MachineOperand.cpp9
3 files changed, 21 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 1250e3588bc..ccec5b4348d 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -854,23 +854,23 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
const MachineOperand &Op = MI.getOperand(OpIdx);
printTargetFlags(Op);
switch (Op.getType()) {
+ case MachineOperand::MO_Immediate:
+ if (MI.isOperandSubregIdx(OpIdx)) {
+ MachineOperand::printSubregIdx(OS, Op.getImm(), TRI);
+ break;
+ }
+ LLVM_FALLTHROUGH;
case MachineOperand::MO_Register:
case MachineOperand::MO_CImmediate:
case MachineOperand::MO_MachineBasicBlock: {
unsigned TiedOperandIdx = 0;
- if (ShouldPrintRegisterTies && Op.isTied() && !Op.isDef())
+ if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo();
Op.print(OS, MST, TypeToPrint, PrintDef, ShouldPrintRegisterTies,
TiedOperandIdx, TRI, TII);
break;
}
- case MachineOperand::MO_Immediate:
- if (MI.isOperandSubregIdx(OpIdx))
- OS << "%subreg." << TRI->getSubRegIndexName(Op.getImm());
- else
- OS << Op.getImm();
- break;
case MachineOperand::MO_FPImmediate:
Op.getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);
break;
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index fb0b82c348c..96722b26ee8 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -1405,8 +1405,11 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
} else {
LLT TypeToPrint = MRI ? getTypeToPrint(i, PrintedTypes, *MRI) : LLT{};
unsigned TiedOperandIdx = getTiedOperandIdx(i);
- MO.print(OS, MST, TypeToPrint, /*PrintDef=*/true, ShouldPrintRegisterTies,
- TiedOperandIdx, TRI, IntrinsicInfo);
+ if (MO.isImm() && isOperandSubregIdx(i))
+ MachineOperand::printSubregIdx(OS, MO.getImm(), TRI);
+ else
+ MO.print(OS, MST, TypeToPrint, /*PrintDef=*/true,
+ ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo);
}
}
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 0cbcb65a99a..8bd6a7a965b 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -345,6 +345,15 @@ static void tryToGetTargetInfo(const MachineOperand &MO,
}
}
+void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index,
+ const TargetRegisterInfo *TRI) {
+ OS << "%subreg.";
+ if (TRI)
+ OS << TRI->getSubRegIndexName(Index);
+ else
+ OS << Index;
+}
+
void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI,
const TargetIntrinsicInfo *IntrinsicInfo) const {
tryToGetTargetInfo(*this, TRI, IntrinsicInfo);
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