summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/MachineVerifier.cpp16
-rw-r--r--llvm/lib/CodeGen/RegAllocBasic.cpp5
-rw-r--r--llvm/lib/CodeGen/RegAllocGreedy.cpp4
-rw-r--r--llvm/lib/CodeGen/RegAllocPBQP.cpp5
-rw-r--r--llvm/lib/CodeGen/VirtRegMap.cpp5
5 files changed, 20 insertions, 15 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 15180b52eb1..b957fd824f8 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -251,6 +251,7 @@ namespace {
void verifyStackFrame();
void verifySlotIndexes() const;
+ void verifyProperties(const MachineFunction &MF);
};
struct MachineVerifierPass : public MachineFunctionPass {
@@ -307,6 +308,19 @@ void MachineVerifier::verifySlotIndexes() const {
}
}
+void MachineVerifier::verifyProperties(const MachineFunction &MF) {
+ // If a pass has introduced virtual registers without clearing the
+ // AllVRegsAllocated property (or set it without allocating the vregs)
+ // then report an error.
+ if (MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::AllVRegsAllocated) &&
+ MRI->getNumVirtRegs()) {
+ report(
+ "Function has AllVRegsAllocated property but there are VReg operands",
+ &MF);
+ }
+}
+
unsigned MachineVerifier::verify(MachineFunction &MF) {
foundErrors = 0;
@@ -331,6 +345,8 @@ unsigned MachineVerifier::verify(MachineFunction &MF) {
verifySlotIndexes();
+ verifyProperties(MF);
+
visitMachineFunctionBefore();
for (MachineFunction::const_iterator MFI = MF.begin(), MFE = MF.end();
MFI!=MFE; ++MFI) {
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index c9b9b8aae21..cfe367d5115 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -83,11 +83,6 @@ public:
/// RABasic analysis usage.
void getAnalysisUsage(AnalysisUsage &AU) const override;
- MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::AllVRegsAllocated);
- }
-
void releaseMemory() override;
Spiller &spiller() override { return *SpillerInstance; }
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 2e809fa9d1d..b243d4357bd 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -322,10 +322,6 @@ public:
/// RAGreedy analysis usage.
void getAnalysisUsage(AnalysisUsage &AU) const override;
- MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::AllVRegsAllocated);
- }
void releaseMemory() override;
Spiller &spiller() override { return *SpillerInstance; }
void enqueue(LiveInterval *LI) override;
diff --git a/llvm/lib/CodeGen/RegAllocPBQP.cpp b/llvm/lib/CodeGen/RegAllocPBQP.cpp
index a9ebea0ab47..d5b0f96e24a 100644
--- a/llvm/lib/CodeGen/RegAllocPBQP.cpp
+++ b/llvm/lib/CodeGen/RegAllocPBQP.cpp
@@ -106,11 +106,6 @@ public:
/// PBQP analysis usage.
void getAnalysisUsage(AnalysisUsage &au) const override;
- MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::AllVRegsAllocated);
- }
-
/// Perform register allocation
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 6c7493d17cb..ffbab08d59b 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -176,6 +176,10 @@ public:
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction&) override;
+ MachineFunctionProperties getSetProperties() const override {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::AllVRegsAllocated);
+ }
};
} // end anonymous namespace
@@ -445,4 +449,3 @@ void VirtRegRewriter::rewrite() {
}
}
}
-
OpenPOWER on IntegriCloud