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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp14
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h10
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp8
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp13
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp6
5 files changed, 40 insertions, 11 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
index fc9c227e4df..e4baa3322ba 100644
--- a/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
@@ -694,6 +694,20 @@ InstrEmitter::EmitDbgValue(SDDbgValue *SD,
assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
"Expected inlined-at fields to agree");
+ SD->setIsEmitted();
+
+ if (SD->isInvalidated()) {
+ // An invalidated SDNode must generate an undef DBG_VALUE: although the
+ // original value is no longer computed, earlier DBG_VALUEs live ranges
+ // must not leak into later code.
+ auto MIB = BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE));
+ MIB.addReg(0U);
+ MIB.addReg(0U, RegState::Debug);
+ MIB.addMetadata(Var);
+ MIB.addMetadata(Expr);
+ return &*MIB;
+ }
+
if (SD->getKind() == SDDbgValue::FRAMEIX) {
// Stack address; this needs to be lowered in target-dependent fashion.
// EmitTargetCodeForFrameDebugValue is responsible for allocation.
diff --git a/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h b/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
index 490105a9d58..f7566b246f3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
+++ b/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
@@ -53,6 +53,7 @@ private:
enum DbgValueKind kind;
bool IsIndirect;
bool Invalid = false;
+ bool Emitted = false;
public:
/// Constructor for non-constants.
@@ -126,6 +127,15 @@ public:
void setIsInvalidated() { Invalid = true; }
bool isInvalidated() const { return Invalid; }
+ /// setIsEmitted / isEmitted - Getter/Setter for flag indicating that this
+ /// SDDbgValue has been emitted to an MBB.
+ void setIsEmitted() { Emitted = true; }
+ bool isEmitted() const { return Emitted; }
+
+ /// clearIsEmitted - Reset Emitted flag, for certain special cases where
+ /// dbg.addr is emitted twice.
+ void clearIsEmitted() { Emitted = false; }
+
LLVM_DUMP_METHOD void dump(raw_ostream &OS) const;
};
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
index 4b06cfcc7f6..90e109b022f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
@@ -776,11 +776,9 @@ ScheduleDAGLinearize::EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
if (N->getHasDebugValue()) {
MachineBasicBlock::iterator InsertPos = Emitter.getInsertPos();
for (auto DV : DAG->GetDbgValues(N)) {
- if (DV->isInvalidated())
- continue;
- if (auto *DbgMI = Emitter.EmitDbgValue(DV, VRBaseMap))
- BB->insert(InsertPos, DbgMI);
- DV->setIsInvalidated();
+ if (!DV->isEmitted())
+ if (auto *DbgMI = Emitter.EmitDbgValue(DV, VRBaseMap))
+ BB->insert(InsertPos, DbgMI);
}
}
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index 957b2e35494..e258f0a218a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -722,7 +722,7 @@ ProcessSDDbgValues(SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter,
MachineBasicBlock *BB = Emitter.getBlock();
MachineBasicBlock::iterator InsertPos = Emitter.getInsertPos();
for (auto DV : DAG->GetDbgValues(N)) {
- if (DV->isInvalidated())
+ if (DV->isEmitted())
continue;
unsigned DVOrder = DV->getOrder();
if (!Order || DVOrder == Order) {
@@ -731,7 +731,6 @@ ProcessSDDbgValues(SDNode *N, SelectionDAG *DAG, InstrEmitter &Emitter,
Orders.push_back({DVOrder, DbgMI});
BB->insert(InsertPos, DbgMI);
}
- DV->setIsInvalidated();
}
}
}
@@ -822,8 +821,12 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
SDDbgInfo::DbgIterator PDE = DAG->ByvalParmDbgEnd();
for (; PDI != PDE; ++PDI) {
MachineInstr *DbgMI= Emitter.EmitDbgValue(*PDI, VRBaseMap);
- if (DbgMI)
+ if (DbgMI) {
BB->insert(InsertPos, DbgMI);
+ // We re-emit the dbg_value closer to its use, too, after instructions
+ // are emitted to the BB.
+ (*PDI)->clearIsEmitted();
+ }
}
}
@@ -889,7 +892,7 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
for (; DI != DE; ++DI) {
if ((*DI)->getOrder() < LastOrder || (*DI)->getOrder() >= Order)
break;
- if ((*DI)->isInvalidated())
+ if ((*DI)->isEmitted())
continue;
MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, VRBaseMap);
@@ -911,7 +914,7 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
// some of them before one or more conditional branches?
SmallVector<MachineInstr*, 8> DbgMIs;
for (; DI != DE; ++DI) {
- if ((*DI)->isInvalidated())
+ if ((*DI)->isEmitted())
continue;
assert((*DI)->getOrder() >= LastOrder &&
"emitting DBG_VALUE out of order");
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 9b43f13dbfe..01364944b22 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -7740,8 +7740,11 @@ void SelectionDAG::transferDbgValues(SDValue From, SDValue To,
Dbg->getDebugLoc(), Dbg->getOrder());
ClonedDVs.push_back(Clone);
- if (InvalidateDbg)
+ if (InvalidateDbg) {
+ // Invalidate value and indicate the SDDbgValue should not be emitted.
Dbg->setIsInvalidated();
+ Dbg->setIsEmitted();
+ }
}
for (SDDbgValue *Dbg : ClonedDVs)
@@ -7778,6 +7781,7 @@ void SelectionDAG::salvageDebugInfo(SDNode &N) {
DV->isIndirect(), DV->getDebugLoc(), DV->getOrder());
ClonedDVs.push_back(Clone);
DV->setIsInvalidated();
+ DV->setIsEmitted();
LLVM_DEBUG(dbgs() << "SALVAGE: Rewriting";
N0.getNode()->dumprFull(this);
dbgs() << " into " << *DIExpr << '\n');
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