diff options
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 12 | ||||
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 4 |
3 files changed, 9 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index d35f0da393e..70960999338 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3082,7 +3082,7 @@ void SelectionDAGLegalize::PromoteNode(SDNode *Node, ExtOp = ISD::ANY_EXTEND; TruncOp = ISD::TRUNCATE; } else { - llvm_report_error("Cannot promote logic operation"); + report_fatal_error("Cannot promote logic operation"); } // Promote each of the values to the new type. Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0)); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 85c30ab8c9c..583161fb089 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -4993,7 +4993,7 @@ public: if (isIndirect) { const llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy); if (!PtrTy) - llvm_report_error("Indirect operand for inline asm not a pointer!"); + report_fatal_error("Indirect operand for inline asm not a pointer!"); OpTy = PtrTy->getElementType(); } @@ -5331,7 +5331,7 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { Input.ConstraintVT.isInteger()) || (OpInfo.ConstraintVT.getSizeInBits() != Input.ConstraintVT.getSizeInBits())) { - llvm_report_error("Unsupported asm: input constraint" + report_fatal_error("Unsupported asm: input constraint" " with a matching output constraint of incompatible" " type!"); } @@ -5444,7 +5444,7 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { // Copy the output from the appropriate register. Find a register that // we can use. if (OpInfo.AssignedRegs.Regs.empty()) - llvm_report_error("Couldn't allocate output reg for" + report_fatal_error("Couldn't allocate output reg for" " constraint '" + OpInfo.ConstraintCode + "'!"); // If this is an indirect operand, store through the pointer after the @@ -5497,7 +5497,7 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { InlineAsm::isRegDefEarlyClobberKind(OpFlag)) { // Add (OpFlag&0xffff)>>3 registers to MatchedRegs. if (OpInfo.isIndirect) - llvm_report_error("Don't know how to handle tied indirect " + report_fatal_error("Don't know how to handle tied indirect " "register inputs yet!"); RegsForValue MatchedRegs; MatchedRegs.TLI = &TLI; @@ -5540,7 +5540,7 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode[0], hasMemory, Ops, DAG); if (Ops.empty()) { - llvm_report_error("Invalid operand for inline asm" + report_fatal_error("Invalid operand for inline asm" " constraint '" + OpInfo.ConstraintCode + "'!"); } @@ -5575,7 +5575,7 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) { // Copy the input into the appropriate registers. if (OpInfo.AssignedRegs.Regs.empty() || !OpInfo.AssignedRegs.areValueTypesLegal()) { - llvm_report_error("Couldn't allocate input reg for" + report_fatal_error("Couldn't allocate input reg for" " constraint '"+ OpInfo.ConstraintCode +"'!"); } diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 9c9d3217cca..44f62ab435f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -1354,7 +1354,7 @@ SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops) { // Otherwise, this is a memory operand. Ask the target to select it. std::vector<SDValue> SelOps; if (SelectInlineAsmMemoryOperand(InOps[i+1], 'm', SelOps)) - llvm_report_error("Could not match memory address. Inline asm" + report_fatal_error("Could not match memory address. Inline asm" " failure!"); // Add this to the output node. @@ -2778,7 +2778,7 @@ void SelectionDAGISel::CannotYetSelect(SDNode *N) { else Msg << "unknown intrinsic #" << iid; } - llvm_report_error(Msg.str()); + report_fatal_error(Msg.str()); } char SelectionDAGISel::ID = 0; |