diff options
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index d3d13a21043..58b9f450f57 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -3561,6 +3561,7 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG, auto BuildUDIVPattern = [](const APInt &Divisor, unsigned &PreShift, APInt &Magic, unsigned &PostShift) { + assert(!Divisor.isOneValue() && "UDIV by one not supported"); // FIXME: We should use a narrower constant when the upper // bits are known to be zero. APInt::mu magics = Divisor.magicu(); @@ -3606,6 +3607,9 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG, auto *C = dyn_cast<ConstantSDNode>(N1.getOperand(i)); if (!C || C->isNullValue() || C->getAPIntValue().getBitWidth() != EltBits) return SDValue(); + // TODO: Handle udiv by one. + if (C->isOne()) + return SDValue(); APInt MagicVal; unsigned PreShiftVal, PostShiftVal; bool SelNPQ = BuildUDIVPattern(C->getAPIntValue(), PreShiftVal, MagicVal, |
