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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp20
1 files changed, 4 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 787091a7f4c..d0fb3ea2d30 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -1105,23 +1105,11 @@ SDValue VectorLegalizer::ExpandCTLZ(SDValue Op) {
SDValue VectorLegalizer::ExpandCTTZ(SDValue Op) {
EVT VT = Op.getValueType();
- unsigned NumBitsPerElt = VT.getScalarSizeInBits();
-
- // If the non-ZERO_UNDEF version is supported we can use that instead.
- if (TLI.isOperationLegalOrCustom(ISD::CTTZ, VT)) {
- SDLoc DL(Op);
- return DAG.getNode(ISD::CTTZ, DL, VT, Op.getOperand(0));
- }
- // If we have the appropriate vector bit operations, it is better to use them
- // than unrolling and expanding each component.
- if (isPowerOf2_32(NumBitsPerElt) &&
- (TLI.isOperationLegalOrCustom(ISD::CTPOP, VT) ||
- TLI.isOperationLegalOrCustom(ISD::CTLZ, VT)) &&
- TLI.isOperationLegalOrCustom(ISD::SUB, VT) &&
- TLI.isOperationLegalOrCustomOrPromote(ISD::AND, VT) &&
- TLI.isOperationLegalOrCustomOrPromote(ISD::XOR, VT))
- return Op;
+ // Attempt to expand using TargetLowering.
+ SDValue Result;
+ if (TLI.expandCTTZ(Op.getNode(), Result, DAG))
+ return Result;
// Otherwise go ahead and unroll.
return DAG.UnrollVectorOp(Op.getNode());
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