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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 73faff2f582..d1727a15ea0 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5258,6 +5258,22 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) {
}
}
+ // select (xor Cond, 1), X, Y -> select Cond, Y, X
+ // select (xor Cond, 0), X, Y -> selext Cond, X, Y
+ if (VT0 == MVT::i1) {
+ if (N0->getOpcode() == ISD::XOR) {
+ if (auto *C = dyn_cast<ConstantSDNode>(N0->getOperand(1))) {
+ SDValue Cond0 = N0->getOperand(0);
+ if (C->isOne())
+ return DAG.getNode(ISD::SELECT, SDLoc(N), N1.getValueType(),
+ Cond0, N2, N1);
+ else
+ return DAG.getNode(ISD::SELECT, SDLoc(N), N1.getValueType(),
+ Cond0, N1, N2);
+ }
+ }
+ }
+
// fold selects based on a setcc into other things, such as min/max/abs
if (N0.getOpcode() == ISD::SETCC) {
// select x, y (fcmp lt x, y) -> fminnum x, y
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