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-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp17
1 files changed, 8 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 41db2c88ce5..3ebb76d5f20 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -197,9 +197,8 @@ bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr &MI,
unsigned SrcReg = MI.getOperand(1).getReg();
unsigned DstReg = MI.getOperand(0).getReg();
- if (!TargetRegisterInfo::isVirtualRegister(SrcReg) ||
- !TargetRegisterInfo::isVirtualRegister(DstReg) ||
- !MRI->hasOneNonDBGUse(SrcReg))
+ if (!Register::isVirtualRegister(SrcReg) ||
+ !Register::isVirtualRegister(DstReg) || !MRI->hasOneNonDBGUse(SrcReg))
return false;
const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg);
@@ -233,8 +232,7 @@ MachineSinking::AllUsesDominatedByBlock(unsigned Reg,
MachineBasicBlock *DefMBB,
bool &BreakPHIEdge,
bool &LocalUse) const {
- assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
- "Only makes sense for vregs");
+ assert(Register::isVirtualRegister(Reg) && "Only makes sense for vregs");
// Ignore debug uses because debug info doesn't affect the code.
if (MRI->use_nodbg_empty(Reg))
@@ -422,7 +420,7 @@ bool MachineSinking::isWorthBreakingCriticalEdge(MachineInstr &MI,
// We don't move live definitions of physical registers,
// so sinking their uses won't enable any opportunities.
- if (TargetRegisterInfo::isPhysicalRegister(Reg))
+ if (Register::isPhysicalRegister(Reg))
continue;
// If this instruction is the only user of a virtual register,
@@ -618,7 +616,7 @@ MachineSinking::FindSuccToSinkTo(MachineInstr &MI, MachineBasicBlock *MBB,
unsigned Reg = MO.getReg();
if (Reg == 0) continue;
- if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ if (Register::isPhysicalRegister(Reg)) {
if (MO.isUse()) {
// If the physreg has no defs anywhere, it's just an ambient register
// and we can freely move its uses. Alternatively, if it's allocatable,
@@ -818,7 +816,8 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore,
const MachineOperand &MO = MI.getOperand(I);
if (!MO.isReg()) continue;
unsigned Reg = MO.getReg();
- if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
+ if (Reg == 0 || !Register::isPhysicalRegister(Reg))
+ continue;
if (SuccToSinkTo->isLiveIn(Reg))
return false;
}
@@ -1130,7 +1129,7 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB,
// for DBG_VALUEs later, record them when they're encountered.
if (MI->isDebugValue()) {
auto &MO = MI->getOperand(0);
- if (MO.isReg() && TRI->isPhysicalRegister(MO.getReg())) {
+ if (MO.isReg() && Register::isPhysicalRegister(MO.getReg())) {
// Bail if we can already tell the sink would be rejected, rather
// than needlessly accumulating lots of DBG_VALUEs.
if (hasRegisterDependency(MI, UsedOpsInCopy, DefedRegsInCopy,
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