summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/MachineScheduler.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineScheduler.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index bc89b134f85..3eaefa8691e 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -878,8 +878,8 @@ void ScheduleDAGMILive::initRegPressure() {
DEBUG(RPTracker.dump());
// Initialize the live ins and live outs.
- TopRPTracker.addLiveRegs(RPTracker.getPressure().LiveInRegs);
- BotRPTracker.addLiveRegs(RPTracker.getPressure().LiveOutRegs);
+ TopRPTracker.addLiveRegs(RPTracker.getLiveIn());
+ BotRPTracker.addLiveRegs(RPTracker.getLiveOut());
// Close one end of the tracker so we can call
// getMaxUpward/DownwardPressureDelta before advancing across any
@@ -896,7 +896,7 @@ void ScheduleDAGMILive::initRegPressure() {
// For each live out vreg reduce the pressure change associated with other
// uses of the same vreg below the live-out reaching def.
- updatePressureDiffs(RPTracker.getPressure().LiveOutRegs);
+ updatePressureDiffs(RPTracker.getLiveOut());
// Account for liveness generated by the region boundary.
if (LiveRegionEnd != RegionEnd) {
@@ -1135,7 +1135,7 @@ unsigned ScheduleDAGMILive::computeCyclicCriticalPath() {
unsigned MaxCyclicLatency = 0;
// Visit each live out vreg def to find def/use pairs that cross iterations.
- ArrayRef<unsigned> LiveOuts = RPTracker.getPressure().LiveOutRegs;
+ ArrayRef<unsigned> LiveOuts = RPTracker.getLiveOut();
for (ArrayRef<unsigned>::iterator RI = LiveOuts.begin(), RE = LiveOuts.end();
RI != RE; ++RI) {
unsigned Reg = *RI;
OpenPOWER on IntegriCloud