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-rw-r--r--llvm/include/llvm/CodeGen/ScheduleDAG.h13
1 files changed, 3 insertions, 10 deletions
diff --git a/llvm/include/llvm/CodeGen/ScheduleDAG.h b/llvm/include/llvm/CodeGen/ScheduleDAG.h
index fdd57003571..77d1a1cce44 100644
--- a/llvm/include/llvm/CodeGen/ScheduleDAG.h
+++ b/llvm/include/llvm/CodeGen/ScheduleDAG.h
@@ -279,7 +279,6 @@ namespace llvm {
if (isa<ConstantPoolSDNode>(Node)) return true;
if (isa<JumpTableSDNode>(Node)) return true;
if (isa<ExternalSymbolSDNode>(Node)) return true;
- if (isa<MemOperandSDNode>(Node)) return true;
return false;
}
@@ -313,15 +312,11 @@ namespace llvm {
/// (which do not go into the machine instrs.)
static unsigned CountResults(SDNode *Node);
- /// CountOperands - The inputs to target nodes have any actual inputs first,
- /// followed by optional memory operands chain operand, then flag operands.
- /// Compute the number of actual operands that will go into the machine
- /// instr.
+ /// CountOperands The inputs to target nodes have any actual inputs first,
+ /// followed by an optional chain operand, then flag operands. Compute the
+ /// number of actual operands that will go into the machine instr.
static unsigned CountOperands(SDNode *Node);
- /// CountMemOperands - Find the index of the last MemOperandSDNode
- static unsigned CountMemOperands(SDNode *Node);
-
/// EmitNode - Generate machine code for an node and needed dependencies.
/// VRBaseMap contains, for each already emitted node, the first virtual
/// register number for the results of the node.
@@ -362,8 +357,6 @@ namespace llvm {
void AddOperand(MachineInstr *MI, SDOperand Op, unsigned IIOpNum,
const TargetInstrDesc *II,
DenseMap<SDOperand, unsigned> &VRBaseMap);
-
- void AddMemOperand(MachineInstr *MI, const MemOperand &MO);
};
/// createBURRListDAGScheduler - This creates a bottom up register usage
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