diff options
Diffstat (limited to 'llvm/docs/AMDGPU')
| -rw-r--r-- | llvm/docs/AMDGPU/gfx7_attr.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx7_hwreg.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx7_label.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx7_msg.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx7_src_exp.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx7_waitcnt.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx8_attr.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx8_hwreg.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx8_label.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx8_msg.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx8_src_exp.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx8_waitcnt.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx9_attr.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx9_hwreg.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx9_label.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx9_msg.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx9_src_exp.rst | 2 | ||||
| -rw-r--r-- | llvm/docs/AMDGPU/gfx9_waitcnt.rst | 2 |
18 files changed, 18 insertions, 18 deletions
diff --git a/llvm/docs/AMDGPU/gfx7_attr.rst b/llvm/docs/AMDGPU/gfx7_attr.rst index 13096f2276a..219b77414ab 100644 --- a/llvm/docs/AMDGPU/gfx7_attr.rst +++ b/llvm/docs/AMDGPU/gfx7_attr.rst @@ -23,7 +23,7 @@ Interpolation attribute and channel: Examples: -.. code-block:: nasm +.. parsed-literal:: v_interp_p1_f32 v1, v0, attr0.x v_interp_p1_f32 v1, v0, attr32.w diff --git a/llvm/docs/AMDGPU/gfx7_hwreg.rst b/llvm/docs/AMDGPU/gfx7_hwreg.rst index 1b0c5424973..1e2d96417c3 100644 --- a/llvm/docs/AMDGPU/gfx7_hwreg.rst +++ b/llvm/docs/AMDGPU/gfx7_hwreg.rst @@ -51,7 +51,7 @@ Defined register *names* include: Examples: -.. code-block:: nasm +.. parsed-literal:: s_getreg_b32 s2, 0x6 s_getreg_b32 s2, hwreg(15) diff --git a/llvm/docs/AMDGPU/gfx7_label.rst b/llvm/docs/AMDGPU/gfx7_label.rst index e0153e7171f..ed2f3a41666 100644 --- a/llvm/docs/AMDGPU/gfx7_label.rst +++ b/llvm/docs/AMDGPU/gfx7_label.rst @@ -20,7 +20,7 @@ This operand may be specified as: Examples: -.. code-block:: nasm +.. parsed-literal:: offset = 30 s_branch loop_end diff --git a/llvm/docs/AMDGPU/gfx7_msg.rst b/llvm/docs/AMDGPU/gfx7_msg.rst index ad5fd7f640e..5476053ccc1 100644 --- a/llvm/docs/AMDGPU/gfx7_msg.rst +++ b/llvm/docs/AMDGPU/gfx7_msg.rst @@ -60,7 +60,7 @@ Each message type supports specific operations: Examples: -.. code-block:: nasm +.. parsed-literal:: s_sendmsg 0x12 s_sendmsg sendmsg(MSG_INTERRUPT) diff --git a/llvm/docs/AMDGPU/gfx7_src_exp.rst b/llvm/docs/AMDGPU/gfx7_src_exp.rst index 6d155a54f11..32f71a88b64 100644 --- a/llvm/docs/AMDGPU/gfx7_src_exp.rst +++ b/llvm/docs/AMDGPU/gfx7_src_exp.rst @@ -19,7 +19,7 @@ Data to copy to export buffers. This is an optional operand. Must be specified a An example: -.. code-block:: nasm +.. parsed-literal:: exp mrtz v3, v3, off, off compr diff --git a/llvm/docs/AMDGPU/gfx7_waitcnt.rst b/llvm/docs/AMDGPU/gfx7_waitcnt.rst index c89a320dc5c..3f5e07d1649 100644 --- a/llvm/docs/AMDGPU/gfx7_waitcnt.rst +++ b/llvm/docs/AMDGPU/gfx7_waitcnt.rst @@ -44,7 +44,7 @@ These helpers may be specified in any order. Ampersands and commas may be used a Examples: -.. code-block:: nasm +.. parsed-literal:: s_waitcnt 0 s_waitcnt vmcnt(1) diff --git a/llvm/docs/AMDGPU/gfx8_attr.rst b/llvm/docs/AMDGPU/gfx8_attr.rst index 3f28033300a..12fa2cde842 100644 --- a/llvm/docs/AMDGPU/gfx8_attr.rst +++ b/llvm/docs/AMDGPU/gfx8_attr.rst @@ -23,7 +23,7 @@ Interpolation attribute and channel: Examples: -.. code-block:: nasm +.. parsed-literal:: v_interp_p1_f32 v1, v0, attr0.x v_interp_p1_f32 v1, v0, attr32.w diff --git a/llvm/docs/AMDGPU/gfx8_hwreg.rst b/llvm/docs/AMDGPU/gfx8_hwreg.rst index d9b4299adae..ffa1ea5afde 100644 --- a/llvm/docs/AMDGPU/gfx8_hwreg.rst +++ b/llvm/docs/AMDGPU/gfx8_hwreg.rst @@ -51,7 +51,7 @@ Defined register *names* include: Examples: -.. code-block:: nasm +.. parsed-literal:: s_getreg_b32 s2, 0x6 s_getreg_b32 s2, hwreg(15) diff --git a/llvm/docs/AMDGPU/gfx8_label.rst b/llvm/docs/AMDGPU/gfx8_label.rst index af63ad977fc..99e384ee392 100644 --- a/llvm/docs/AMDGPU/gfx8_label.rst +++ b/llvm/docs/AMDGPU/gfx8_label.rst @@ -20,7 +20,7 @@ This operand may be specified as: Examples: -.. code-block:: nasm +.. parsed-literal:: offset = 30 s_branch loop_end diff --git a/llvm/docs/AMDGPU/gfx8_msg.rst b/llvm/docs/AMDGPU/gfx8_msg.rst index 8140bc2f45a..313d8e68b4b 100644 --- a/llvm/docs/AMDGPU/gfx8_msg.rst +++ b/llvm/docs/AMDGPU/gfx8_msg.rst @@ -60,7 +60,7 @@ Each message type supports specific operations: Examples: -.. code-block:: nasm +.. parsed-literal:: s_sendmsg 0x12 s_sendmsg sendmsg(MSG_INTERRUPT) diff --git a/llvm/docs/AMDGPU/gfx8_src_exp.rst b/llvm/docs/AMDGPU/gfx8_src_exp.rst index 92340c539fe..10449b4e36e 100644 --- a/llvm/docs/AMDGPU/gfx8_src_exp.rst +++ b/llvm/docs/AMDGPU/gfx8_src_exp.rst @@ -19,7 +19,7 @@ Data to copy to export buffers. This is an optional operand. Must be specified a An example: -.. code-block:: nasm +.. parsed-literal:: exp mrtz v3, v3, off, off compr diff --git a/llvm/docs/AMDGPU/gfx8_waitcnt.rst b/llvm/docs/AMDGPU/gfx8_waitcnt.rst index d16478817ad..4bad5941711 100644 --- a/llvm/docs/AMDGPU/gfx8_waitcnt.rst +++ b/llvm/docs/AMDGPU/gfx8_waitcnt.rst @@ -44,7 +44,7 @@ These helpers may be specified in any order. Ampersands and commas may be used a Examples: -.. code-block:: nasm +.. parsed-literal:: s_waitcnt 0 s_waitcnt vmcnt(1) diff --git a/llvm/docs/AMDGPU/gfx9_attr.rst b/llvm/docs/AMDGPU/gfx9_attr.rst index c69589f2032..faffcc7ed18 100644 --- a/llvm/docs/AMDGPU/gfx9_attr.rst +++ b/llvm/docs/AMDGPU/gfx9_attr.rst @@ -23,7 +23,7 @@ Interpolation attribute and channel: Examples: -.. code-block:: nasm +.. parsed-literal:: v_interp_p1_f32 v1, v0, attr0.x v_interp_p1_f32 v1, v0, attr32.w diff --git a/llvm/docs/AMDGPU/gfx9_hwreg.rst b/llvm/docs/AMDGPU/gfx9_hwreg.rst index cecba1e3c4e..7ebb38b42fe 100644 --- a/llvm/docs/AMDGPU/gfx9_hwreg.rst +++ b/llvm/docs/AMDGPU/gfx9_hwreg.rst @@ -52,7 +52,7 @@ Defined register *names* include: Examples: -.. code-block:: nasm +.. parsed-literal:: s_getreg_b32 s2, 0x6 s_getreg_b32 s2, hwreg(15) diff --git a/llvm/docs/AMDGPU/gfx9_label.rst b/llvm/docs/AMDGPU/gfx9_label.rst index 09fde5e696a..32771722f71 100644 --- a/llvm/docs/AMDGPU/gfx9_label.rst +++ b/llvm/docs/AMDGPU/gfx9_label.rst @@ -20,7 +20,7 @@ This operand may be specified as: Examples: -.. code-block:: nasm +.. parsed-literal:: offset = 30 s_branch loop_end diff --git a/llvm/docs/AMDGPU/gfx9_msg.rst b/llvm/docs/AMDGPU/gfx9_msg.rst index 41cd7da25cc..f18cff46ecb 100644 --- a/llvm/docs/AMDGPU/gfx9_msg.rst +++ b/llvm/docs/AMDGPU/gfx9_msg.rst @@ -60,7 +60,7 @@ Each message type supports specific operations: Examples: -.. code-block:: nasm +.. parsed-literal:: s_sendmsg 0x12 s_sendmsg sendmsg(MSG_INTERRUPT) diff --git a/llvm/docs/AMDGPU/gfx9_src_exp.rst b/llvm/docs/AMDGPU/gfx9_src_exp.rst index 71eaac01c35..91a5d53b92b 100644 --- a/llvm/docs/AMDGPU/gfx9_src_exp.rst +++ b/llvm/docs/AMDGPU/gfx9_src_exp.rst @@ -19,7 +19,7 @@ Data to copy to export buffers. This is an optional operand. Must be specified a An example: -.. code-block:: nasm +.. parsed-literal:: exp mrtz v3, v3, off, off compr diff --git a/llvm/docs/AMDGPU/gfx9_waitcnt.rst b/llvm/docs/AMDGPU/gfx9_waitcnt.rst index 5f755fcf48a..015a51ae8c3 100644 --- a/llvm/docs/AMDGPU/gfx9_waitcnt.rst +++ b/llvm/docs/AMDGPU/gfx9_waitcnt.rst @@ -45,7 +45,7 @@ These helpers may be specified in any order. Ampersands and commas may be used a Examples: -.. code-block:: nasm +.. parsed-literal:: s_waitcnt 0 s_waitcnt vmcnt(1) |
