diff options
Diffstat (limited to 'lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp')
| -rw-r--r-- | lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp index b1fbe3215a9..b5a657819af 100644 --- a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp +++ b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp @@ -42,11 +42,9 @@ using namespace lldb_private; #define UInt(x) ((uint64_t)x) #define integer int64_t -//---------------------------------------------------------------------- // // EmulateInstructionMIPS implementation // -//---------------------------------------------------------------------- #ifdef __mips__ extern "C" { @@ -677,9 +675,7 @@ bool EmulateInstructionMIPS::GetRegisterInfo(RegisterKind reg_kind, EmulateInstructionMIPS::MipsOpcode * EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) { static EmulateInstructionMIPS::MipsOpcode g_opcodes[] = { - //---------------------------------------------------------------------- // Prologue/Epilogue instructions - //---------------------------------------------------------------------- {"ADDiu", &EmulateInstructionMIPS::Emulate_ADDiu, "ADDIU rt, rs, immediate"}, {"SW", &EmulateInstructionMIPS::Emulate_SW, "SW rt, offset(rs)"}, @@ -688,9 +684,7 @@ EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) { {"ADDU", &EmulateInstructionMIPS::Emulate_SUBU_ADDU, "ADDU rd, rs, rt"}, {"LUI", &EmulateInstructionMIPS::Emulate_LUI, "LUI rt, immediate"}, - //---------------------------------------------------------------------- // MicroMIPS Prologue/Epilogue instructions - //---------------------------------------------------------------------- {"ADDIUSP_MM", &EmulateInstructionMIPS::Emulate_ADDIUSP, "ADDIU immediate"}, {"ADDIUS5_MM", &EmulateInstructionMIPS::Emulate_ADDIUS5, @@ -711,10 +705,8 @@ EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) { "LWP rd,offset(base)"}, {"JRADDIUSP", &EmulateInstructionMIPS::Emulate_JRADDIUSP, "JRADDIUSP immediate"}, - //---------------------------------------------------------------------- // Load/Store instructions - //---------------------------------------------------------------------- /* Following list of emulated instructions are required by implementation of hardware watchpoint for MIPS in lldb. As we just need the address accessed by instructions, @@ -834,9 +826,7 @@ EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) { {"SCDX", &EmulateInstructionMIPS::Emulate_LDST_Imm, "SCDX rt, offset(base)"}, - //---------------------------------------------------------------------- // MicroMIPS Load/Store instructions - //---------------------------------------------------------------------- {"LBU16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm, "LBU16 rt, decoded_offset(base)"}, {"LHU16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm, @@ -854,9 +844,7 @@ EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) { {"SB16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm, "SB16 rt, offset(base)"}, - //---------------------------------------------------------------------- // Branch instructions - //---------------------------------------------------------------------- {"BEQ", &EmulateInstructionMIPS::Emulate_BXX_3ops, "BEQ rs,rt,offset"}, {"BNE", &EmulateInstructionMIPS::Emulate_BXX_3ops, "BNE rs,rt,offset"}, {"BEQL", &EmulateInstructionMIPS::Emulate_BXX_3ops, "BEQL rs,rt,offset"}, @@ -948,9 +936,7 @@ EmulateInstructionMIPS::GetOpcodeForInstruction(const char *op_name) { {"BNZ_V", &EmulateInstructionMIPS::Emulate_BNZV, "BNZ.V wt,s16"}, {"BZ_V", &EmulateInstructionMIPS::Emulate_BZV, "BZ.V wt,s16"}, - //---------------------------------------------------------------------- // MicroMIPS Branch instructions - //---------------------------------------------------------------------- {"B16_MM", &EmulateInstructionMIPS::Emulate_B16_MM, "B16 offset"}, {"BEQZ16_MM", &EmulateInstructionMIPS::Emulate_Branch_MM, "BEQZ16 rs, offset"}, |
