diff options
Diffstat (limited to 'compiler-rt/lib/builtins/arm')
61 files changed, 535 insertions, 559 deletions
diff --git a/compiler-rt/lib/builtins/arm/adddf3vfp.S b/compiler-rt/lib/builtins/arm/adddf3vfp.S index bddbe6f0162..1a271db0847 100644 --- a/compiler-rt/lib/builtins/arm/adddf3vfp.S +++ b/compiler-rt/lib/builtins/arm/adddf3vfp.S @@ -8,12 +8,11 @@ #include "../assembly.h" -// // double __adddf3vfp(double a, double b) { return a + b; } // // Adds two double precision floating point numbers using the Darwin // calling convention where double arguments are passsed in GPR pairs -// + .syntax unified .p2align 2 DEFINE_COMPILERRT_FUNCTION(__adddf3vfp) @@ -22,7 +21,7 @@ DEFINE_COMPILERRT_FUNCTION(__adddf3vfp) #else vmov d6, r0, r1 // move first param from r0/r1 pair into d6 vmov d7, r2, r3 // move second param from r2/r3 pair into d7 - vadd.f64 d6, d6, d7 + vadd.f64 d6, d6, d7 vmov r0, r1, d6 // move result back to r0/r1 pair #endif bx lr diff --git a/compiler-rt/lib/builtins/arm/addsf3.S b/compiler-rt/lib/builtins/arm/addsf3.S index 0bbc0210111..aa4d40473ed 100644 --- a/compiler-rt/lib/builtins/arm/addsf3.S +++ b/compiler-rt/lib/builtins/arm/addsf3.S @@ -1,16 +1,16 @@ -/*===-- addsf3.S - Adds two single precision floating pointer numbers-----===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __addsf3 (single precision floating pointer number - * addition with the IEEE-754 default rounding (to nearest, ties to even) - * function for the ARM Thumb1 ISA. - * - *===----------------------------------------------------------------------===*/ +//===-- addsf3.S - Adds two single precision floating pointer numbers-----===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __addsf3 (single precision floating pointer number +// addition with the IEEE-754 default rounding (to nearest, ties to even) +// function for the ARM Thumb1 ISA. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" #define significandBits 23 @@ -28,9 +28,9 @@ DEFINE_COMPILERRT_THUMB_FUNCTION(__addsf3) // Get the absolute value of a and b. lsls r2, r0, #1 lsls r3, r1, #1 - lsrs r2, r2, #1 /* aAbs */ + lsrs r2, r2, #1 // aAbs beq LOCAL_LABEL(a_zero_nan_inf) - lsrs r3, r3, #1 /* bAbs */ + lsrs r3, r3, #1 // bAbs beq LOCAL_LABEL(zero_nan_inf) // Detect if a or b is infinity or Nan. @@ -54,9 +54,9 @@ LOCAL_LABEL(no_swap): // Get the significands and shift them to give us round, guard and sticky. lsls r4, r0, #(typeWidth - significandBits) - lsrs r4, r4, #(typeWidth - significandBits - 3) /* aSignificand << 3 */ + lsrs r4, r4, #(typeWidth - significandBits - 3) // aSignificand << 3 lsls r5, r1, #(typeWidth - significandBits) - lsrs r5, r5, #(typeWidth - significandBits - 3) /* bSignificand << 3 */ + lsrs r5, r5, #(typeWidth - significandBits - 3) // bSignificand << 3 // Get the implicitBit. movs r6, #1 @@ -198,7 +198,7 @@ LOCAL_LABEL(do_substraction): beq 1f movs r7, #1 1: - lsrs r4, r6 /* aSignificand >> shift */ + lsrs r4, r6 // aSignificand >> shift orrs r4, r7 b LOCAL_LABEL(form_result) diff --git a/compiler-rt/lib/builtins/arm/aeabi_div0.c b/compiler-rt/lib/builtins/arm/aeabi_div0.c index ddd9e2498cd..7e8862321d8 100644 --- a/compiler-rt/lib/builtins/arm/aeabi_div0.c +++ b/compiler-rt/lib/builtins/arm/aeabi_div0.c @@ -1,33 +1,30 @@ -/* ===-- aeabi_div0.c - ARM Runtime ABI support routines for compiler-rt ---=== - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - * ===----------------------------------------------------------------------=== - * - * This file implements the division by zero helper routines as specified by the - * Run-time ABI for the ARM Architecture. - * - * ===----------------------------------------------------------------------=== - */ +//===-- aeabi_div0.c - ARM Runtime ABI support routines for compiler-rt ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the division by zero helper routines as specified by the +// Run-time ABI for the ARM Architecture. +// +//===----------------------------------------------------------------------===// -/* - * RTABI 4.3.2 - Division by zero - * - * The *div0 functions: - * - Return the value passed to them as a parameter - * - Or, return a fixed value defined by the execution environment (such as 0) - * - Or, raise a signal (often SIGFPE) or throw an exception, and do not return - * - * An application may provide its own implementations of the *div0 functions to - * for a particular behaviour from the *div and *divmod functions called out of - * line. - */ +// RTABI 4.3.2 - Division by zero +// +// The *div0 functions: +// - Return the value passed to them as a parameter +// - Or, return a fixed value defined by the execution environment (such as 0) +// - Or, raise a signal (often SIGFPE) or throw an exception, and do not return +// +// An application may provide its own implementations of the *div0 functions to +// for a particular behaviour from the *div and *divmod functions called out of +// line. #include "../int_lib.h" -/* provide an unused declaration to pacify pendantic compilation */ +// provide an unused declaration to pacify pendantic compilation extern unsigned char declaration; #if defined(__ARM_EABI__) diff --git a/compiler-rt/lib/builtins/arm/clzdi2.S b/compiler-rt/lib/builtins/arm/clzdi2.S index f02b98b99c8..685668b11b8 100644 --- a/compiler-rt/lib/builtins/arm/clzdi2.S +++ b/compiler-rt/lib/builtins/arm/clzdi2.S @@ -1,15 +1,15 @@ -/* ===-- clzdi2.c - Implement __clzdi2 -------------------------------------=== - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - * ===----------------------------------------------------------------------=== - * - * This file implements count leading zeros for 64bit arguments. - * - * ===----------------------------------------------------------------------=== - */ +//===-- clzdi2.c - Implement __clzdi2 -------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements count leading zeros for 64bit arguments. +// +//===----------------------------------------------------------------------===// + #include "../assembly.h" .syntax unified @@ -34,14 +34,12 @@ DEFINE_COMPILERRT_FUNCTION(__clzdi2) #endif JMP(lr) #else - /* Assumption: n != 0 */ + // Assumption: n != 0 - /* - * r0: n - * r1: upper half of n, overwritten after check - * r1: count of leading zeros in n + 1 - * r2: scratch register for shifted r0 - */ + // r0: n + // r1: upper half of n, overwritten after check + // r1: count of leading zeros in n + 1 + // r2: scratch register for shifted r0 #ifdef __ARMEB__ cmp r0, 0 moveq r0, r1 @@ -52,14 +50,12 @@ DEFINE_COMPILERRT_FUNCTION(__clzdi2) movne r1, 1 moveq r1, 33 - /* - * Basic block: - * if ((r0 >> SHIFT) == 0) - * r1 += SHIFT; - * else - * r0 >>= SHIFT; - * for descending powers of two as SHIFT. - */ + // Basic block: + // if ((r0 >> SHIFT) == 0) + // r1 += SHIFT; + // else + // r0 >>= SHIFT; + // for descending powers of two as SHIFT. #define BLOCK(shift) \ lsrs r2, r0, shift; \ movne r0, r2; \ @@ -70,18 +66,16 @@ DEFINE_COMPILERRT_FUNCTION(__clzdi2) BLOCK(4) BLOCK(2) - /* - * The basic block invariants at this point are (r0 >> 2) == 0 and - * r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1. - * - * r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1) - * ---+----------------+----------------+------------+-------------- - * 1 | 1 | 0 | 0 | 1 - * 2 | 0 | 1 | -1 | 0 - * 3 | 0 | 1 | -1 | 0 - * - * The r1's initial value of 1 compensates for the 1 here. - */ + // The basic block invariants at this point are (r0 >> 2) == 0 and + // r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1. + // + // r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1) + // ---+----------------+----------------+------------+-------------- + // 1 | 1 | 0 | 0 | 1 + // 2 | 0 | 1 | -1 | 0 + // 3 | 0 | 1 | -1 | 0 + // + // The r1's initial value of 1 compensates for the 1 here. sub r0, r1, r0, lsr #1 JMP(lr) diff --git a/compiler-rt/lib/builtins/arm/clzsi2.S b/compiler-rt/lib/builtins/arm/clzsi2.S index 32dd148520b..5d86fe486ed 100644 --- a/compiler-rt/lib/builtins/arm/clzsi2.S +++ b/compiler-rt/lib/builtins/arm/clzsi2.S @@ -1,15 +1,15 @@ -/* ===-- clzsi2.c - Implement __clzsi2 -------------------------------------=== - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - * ===----------------------------------------------------------------------=== - * - * This file implements count leading zeros for 32bit arguments. - * - * ===----------------------------------------------------------------------=== - */ +//===-- clzsi2.c - Implement __clzsi2 -------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements count leading zeros for 32bit arguments. +// +//===----------------------------------------------------------------------===// + #include "../assembly.h" .syntax unified @@ -22,23 +22,19 @@ DEFINE_COMPILERRT_FUNCTION(__clzsi2) clz r0, r0 JMP(lr) #else - /* Assumption: n != 0 */ + // Assumption: n != 0 - /* - * r0: n - * r1: count of leading zeros in n + 1 - * r2: scratch register for shifted r0 - */ + // r0: n + // r1: count of leading zeros in n + 1 + // r2: scratch register for shifted r0 mov r1, 1 - /* - * Basic block: - * if ((r0 >> SHIFT) == 0) - * r1 += SHIFT; - * else - * r0 >>= SHIFT; - * for descending powers of two as SHIFT. - */ + // Basic block: + // if ((r0 >> SHIFT) == 0) + // r1 += SHIFT; + // else + // r0 >>= SHIFT; + // for descending powers of two as SHIFT. #define BLOCK(shift) \ lsrs r2, r0, shift; \ @@ -50,18 +46,16 @@ DEFINE_COMPILERRT_FUNCTION(__clzsi2) BLOCK(4) BLOCK(2) - /* - * The basic block invariants at this point are (r0 >> 2) == 0 and - * r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1. - * - * r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1) - * ---+----------------+----------------+------------+-------------- - * 1 | 1 | 0 | 0 | 1 - * 2 | 0 | 1 | -1 | 0 - * 3 | 0 | 1 | -1 | 0 - * - * The r1's initial value of 1 compensates for the 1 here. - */ + // The basic block invariants at this point are (r0 >> 2) == 0 and + // r0 != 0. This means 1 <= r0 <= 3 and 0 <= (r0 >> 1) <= 1. + // + // r0 | (r0 >> 1) == 0 | (r0 >> 1) == 1 | -(r0 >> 1) | 1 - (r0 >> 1) + // ---+----------------+----------------+------------+-------------- + // 1 | 1 | 0 | 0 | 1 + // 2 | 0 | 1 | -1 | 0 + // 3 | 0 | 1 | -1 | 0 + // + // The r1's initial value of 1 compensates for the 1 here. sub r0, r1, r0, lsr #1 JMP(lr) diff --git a/compiler-rt/lib/builtins/arm/divmodsi4.S b/compiler-rt/lib/builtins/arm/divmodsi4.S index 47a7f25d50a..f94438dfd59 100644 --- a/compiler-rt/lib/builtins/arm/divmodsi4.S +++ b/compiler-rt/lib/builtins/arm/divmodsi4.S @@ -1,16 +1,16 @@ -/*===-- divmodsi4.S - 32-bit signed integer divide and modulus ------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __divmodsi4 (32-bit signed integer divide and - * modulus) function for the ARM architecture. A naive digit-by-digit - * computation is employed for simplicity. - * - *===----------------------------------------------------------------------===*/ +//===-- divmodsi4.S - 32-bit signed integer divide and modulus ------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __divmodsi4 (32-bit signed integer divide and +// modulus) function for the ARM architecture. A naive digit-by-digit +// computation is employed for simplicity. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" diff --git a/compiler-rt/lib/builtins/arm/divsi3.S b/compiler-rt/lib/builtins/arm/divsi3.S index ff03811f619..761bf49d3ed 100644 --- a/compiler-rt/lib/builtins/arm/divsi3.S +++ b/compiler-rt/lib/builtins/arm/divsi3.S @@ -1,15 +1,15 @@ -/*===-- divsi3.S - 32-bit signed integer divide ---------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __divsi3 (32-bit signed integer divide) function - * for the ARM architecture as a wrapper around the unsigned routine. - * - *===----------------------------------------------------------------------===*/ +//===-- divsi3.S - 32-bit signed integer divide ---------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __divsi3 (32-bit signed integer divide) function +// for the ARM architecture as a wrapper around the unsigned routine. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" diff --git a/compiler-rt/lib/builtins/arm/eqdf2vfp.S b/compiler-rt/lib/builtins/arm/eqdf2vfp.S index a266df8cc1f..2a0a64b97e7 100644 --- a/compiler-rt/lib/builtins/arm/eqdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/eqdf2vfp.S @@ -8,13 +8,12 @@ #include "../assembly.h" -// // extern int __eqdf2vfp(double a, double b); // // Returns one iff a == b and neither is NaN. -// Uses Darwin calling convention where double precision arguments are passsed +// Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. -// + .syntax unified .p2align 2 DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp) @@ -23,7 +22,7 @@ DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp) #else vmov d6, r0, r1 // load r0/r1 pair in double register vmov d7, r2, r3 // load r2/r3 pair in double register - vcmp.f64 d6, d7 + vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr ITE(eq) diff --git a/compiler-rt/lib/builtins/arm/eqsf2vfp.S b/compiler-rt/lib/builtins/arm/eqsf2vfp.S index 8524251c8a6..5fefe7b7176 100644 --- a/compiler-rt/lib/builtins/arm/eqsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/eqsf2vfp.S @@ -12,7 +12,7 @@ // extern int __eqsf2vfp(float a, float b); // // Returns one iff a == b and neither is NaN. -// Uses Darwin calling convention where single precision arguments are passsed +// Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S b/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S index 96e26af9add..37c8be8dcd9 100644 --- a/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/extendsfdf2vfp.S @@ -12,7 +12,7 @@ // extern double __extendsfdf2vfp(float a); // // Converts single precision float to double precision result. -// Uses Darwin calling convention where a single precision parameter is +// Uses Darwin calling convention where a single precision parameter is // passed in a GPR and a double precision result is returned in R0/R1 pair. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/fixdfsivfp.S b/compiler-rt/lib/builtins/arm/fixdfsivfp.S index cc9e33d123b..af1d4f4fa5f 100644 --- a/compiler-rt/lib/builtins/arm/fixdfsivfp.S +++ b/compiler-rt/lib/builtins/arm/fixdfsivfp.S @@ -12,7 +12,7 @@ // extern int __fixdfsivfp(double a); // // Converts double precision float to a 32-bit int rounding towards zero. -// Uses Darwin calling convention where a double precision parameter is +// Uses Darwin calling convention where a double precision parameter is // passed in GPR register pair. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/fixsfsivfp.S b/compiler-rt/lib/builtins/arm/fixsfsivfp.S index 8087c255dcd..30b2f3cf936 100644 --- a/compiler-rt/lib/builtins/arm/fixsfsivfp.S +++ b/compiler-rt/lib/builtins/arm/fixsfsivfp.S @@ -12,7 +12,7 @@ // extern int __fixsfsivfp(float a); // // Converts single precision float to a 32-bit int rounding towards zero. -// Uses Darwin calling convention where a single precision parameter is +// Uses Darwin calling convention where a single precision parameter is // passed in a GPR.. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S b/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S index 3dbca87715f..44e6dbd4989 100644 --- a/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S +++ b/compiler-rt/lib/builtins/arm/fixunsdfsivfp.S @@ -11,9 +11,9 @@ // // extern unsigned int __fixunsdfsivfp(double a); // -// Converts double precision float to a 32-bit unsigned int rounding towards +// Converts double precision float to a 32-bit unsigned int rounding towards // zero. All negative values become zero. -// Uses Darwin calling convention where a double precision parameter is +// Uses Darwin calling convention where a double precision parameter is // passed in GPR register pair. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/fixunssfsivfp.S b/compiler-rt/lib/builtins/arm/fixunssfsivfp.S index 23077d4df9d..5d6ee7cce27 100644 --- a/compiler-rt/lib/builtins/arm/fixunssfsivfp.S +++ b/compiler-rt/lib/builtins/arm/fixunssfsivfp.S @@ -11,9 +11,9 @@ // // extern unsigned int __fixunssfsivfp(float a); // -// Converts single precision float to a 32-bit unsigned int rounding towards +// Converts single precision float to a 32-bit unsigned int rounding towards // zero. All negative values become zero. -// Uses Darwin calling convention where a single precision parameter is +// Uses Darwin calling convention where a single precision parameter is // passed in a GPR.. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/floatsidfvfp.S b/compiler-rt/lib/builtins/arm/floatsidfvfp.S index 17c4478a532..ae8d2465889 100644 --- a/compiler-rt/lib/builtins/arm/floatsidfvfp.S +++ b/compiler-rt/lib/builtins/arm/floatsidfvfp.S @@ -12,7 +12,7 @@ // extern double __floatsidfvfp(int a); // // Converts a 32-bit int to a double precision float. -// Uses Darwin calling convention where a double precision result is +// Uses Darwin calling convention where a double precision result is // return in GPR register pair. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/floatsisfvfp.S b/compiler-rt/lib/builtins/arm/floatsisfvfp.S index 8e60ad047f8..a36bc5ee5ee 100644 --- a/compiler-rt/lib/builtins/arm/floatsisfvfp.S +++ b/compiler-rt/lib/builtins/arm/floatsisfvfp.S @@ -12,7 +12,7 @@ // extern float __floatsisfvfp(int a); // // Converts single precision float to a 32-bit int rounding towards zero. -// Uses Darwin calling convention where a single precision result is +// Uses Darwin calling convention where a single precision result is // return in a GPR.. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/floatunssidfvfp.S b/compiler-rt/lib/builtins/arm/floatunssidfvfp.S index 5ccc2750fb1..0932dab2bdb 100644 --- a/compiler-rt/lib/builtins/arm/floatunssidfvfp.S +++ b/compiler-rt/lib/builtins/arm/floatunssidfvfp.S @@ -12,7 +12,7 @@ // extern double __floatunssidfvfp(unsigned int a); // // Converts a 32-bit int to a double precision float. -// Uses Darwin calling convention where a double precision result is +// Uses Darwin calling convention where a double precision result is // return in GPR register pair. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/floatunssisfvfp.S b/compiler-rt/lib/builtins/arm/floatunssisfvfp.S index 6b77dac6f6a..9578546f40d 100644 --- a/compiler-rt/lib/builtins/arm/floatunssisfvfp.S +++ b/compiler-rt/lib/builtins/arm/floatunssisfvfp.S @@ -12,7 +12,7 @@ // extern float __floatunssisfvfp(unsigned int a); // // Converts single precision float to a 32-bit int rounding towards zero. -// Uses Darwin calling convention where a single precision result is +// Uses Darwin calling convention where a single precision result is // return in a GPR.. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/gedf2vfp.S b/compiler-rt/lib/builtins/arm/gedf2vfp.S index 11e25f856a3..2af9d909967 100644 --- a/compiler-rt/lib/builtins/arm/gedf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gedf2vfp.S @@ -12,7 +12,7 @@ // extern int __gedf2vfp(double a, double b); // // Returns one iff a >= b and neither is NaN. -// Uses Darwin calling convention where double precision arguments are passsed +// Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/gesf2vfp.S b/compiler-rt/lib/builtins/arm/gesf2vfp.S index 54787e86b0d..cedd1e13eb2 100644 --- a/compiler-rt/lib/builtins/arm/gesf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gesf2vfp.S @@ -12,7 +12,7 @@ // extern int __gesf2vfp(float a, float b); // // Returns one iff a >= b and neither is NaN. -// Uses Darwin calling convention where single precision arguments are passsed +// Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/gtdf2vfp.S b/compiler-rt/lib/builtins/arm/gtdf2vfp.S index 10cd0cbc664..782ad8cac01 100644 --- a/compiler-rt/lib/builtins/arm/gtdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gtdf2vfp.S @@ -12,7 +12,7 @@ // extern double __gtdf2vfp(double a, double b); // // Returns one iff a > b and neither is NaN. -// Uses Darwin calling convention where double precision arguments are passsed +// Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/gtsf2vfp.S b/compiler-rt/lib/builtins/arm/gtsf2vfp.S index 54b50bb3911..1cc2bd14f81 100644 --- a/compiler-rt/lib/builtins/arm/gtsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gtsf2vfp.S @@ -12,7 +12,7 @@ // extern int __gtsf2vfp(float a, float b); // // Returns one iff a > b and neither is NaN. -// Uses Darwin calling convention where single precision arguments are passsed +// Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/ledf2vfp.S b/compiler-rt/lib/builtins/arm/ledf2vfp.S index d33ed1b21e7..0097e4b6c12 100644 --- a/compiler-rt/lib/builtins/arm/ledf2vfp.S +++ b/compiler-rt/lib/builtins/arm/ledf2vfp.S @@ -12,7 +12,7 @@ // extern double __ledf2vfp(double a, double b); // // Returns one iff a <= b and neither is NaN. -// Uses Darwin calling convention where double precision arguments are passsed +// Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/lesf2vfp.S b/compiler-rt/lib/builtins/arm/lesf2vfp.S index 7ef79e876b7..2052d386914 100644 --- a/compiler-rt/lib/builtins/arm/lesf2vfp.S +++ b/compiler-rt/lib/builtins/arm/lesf2vfp.S @@ -12,7 +12,7 @@ // extern int __lesf2vfp(float a, float b); // // Returns one iff a <= b and neither is NaN. -// Uses Darwin calling convention where single precision arguments are passsed +// Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/ltdf2vfp.S b/compiler-rt/lib/builtins/arm/ltdf2vfp.S index 29956d300c9..a126aa9e053 100644 --- a/compiler-rt/lib/builtins/arm/ltdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/ltdf2vfp.S @@ -12,7 +12,7 @@ // extern double __ltdf2vfp(double a, double b); // // Returns one iff a < b and neither is NaN. -// Uses Darwin calling convention where double precision arguments are passsed +// Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/ltsf2vfp.S b/compiler-rt/lib/builtins/arm/ltsf2vfp.S index 7b1e4681547..ba10d71d209 100644 --- a/compiler-rt/lib/builtins/arm/ltsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/ltsf2vfp.S @@ -12,7 +12,7 @@ // extern int __ltsf2vfp(float a, float b); // // Returns one iff a < b and neither is NaN. -// Uses Darwin calling convention where single precision arguments are passsed +// Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/modsi3.S b/compiler-rt/lib/builtins/arm/modsi3.S index ae90fd88777..5312f5b41c4 100644 --- a/compiler-rt/lib/builtins/arm/modsi3.S +++ b/compiler-rt/lib/builtins/arm/modsi3.S @@ -1,15 +1,15 @@ -/*===-- modsi3.S - 32-bit signed integer modulus --------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __modsi3 (32-bit signed integer modulus) function - * for the ARM architecture as a wrapper around the unsigned routine. - * - *===----------------------------------------------------------------------===*/ +//===-- modsi3.S - 32-bit signed integer modulus --------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __modsi3 (32-bit signed integer modulus) function +// for the ARM architecture as a wrapper around the unsigned routine. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" diff --git a/compiler-rt/lib/builtins/arm/nedf2vfp.S b/compiler-rt/lib/builtins/arm/nedf2vfp.S index eb0eb974066..32d35c41d46 100644 --- a/compiler-rt/lib/builtins/arm/nedf2vfp.S +++ b/compiler-rt/lib/builtins/arm/nedf2vfp.S @@ -8,13 +8,12 @@ #include "../assembly.h" -// // extern double __nedf2vfp(double a, double b); // // Returns zero if a and b are unequal and neither is NaN. -// Uses Darwin calling convention where double precision arguments are passsed +// Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. -// + .syntax unified .p2align 2 DEFINE_COMPILERRT_FUNCTION(__nedf2vfp) @@ -23,7 +22,7 @@ DEFINE_COMPILERRT_FUNCTION(__nedf2vfp) #else vmov d6, r0, r1 // load r0/r1 pair in double register vmov d7, r2, r3 // load r2/r3 pair in double register - vcmp.f64 d6, d7 + vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr ITE(ne) diff --git a/compiler-rt/lib/builtins/arm/negdf2vfp.S b/compiler-rt/lib/builtins/arm/negdf2vfp.S index 158ea6f1c9a..b7cf91877e3 100644 --- a/compiler-rt/lib/builtins/arm/negdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/negdf2vfp.S @@ -11,7 +11,7 @@ // // extern double __negdf2vfp(double a, double b); // -// Returns the negation a double precision floating point numbers using the +// Returns the negation a double precision floating point numbers using the // Darwin calling convention where double arguments are passsed in GPR pairs. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/negsf2vfp.S b/compiler-rt/lib/builtins/arm/negsf2vfp.S index 2b2883d2af5..b6d3c618927 100644 --- a/compiler-rt/lib/builtins/arm/negsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/negsf2vfp.S @@ -11,7 +11,7 @@ // // extern float __negsf2vfp(float a); // -// Returns the negation of a single precision floating point numbers using the +// Returns the negation of a single precision floating point numbers using the // Darwin calling convention where single arguments are passsed like 32-bit ints // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/nesf2vfp.S b/compiler-rt/lib/builtins/arm/nesf2vfp.S index c97507e5b28..34c8bb4896c 100644 --- a/compiler-rt/lib/builtins/arm/nesf2vfp.S +++ b/compiler-rt/lib/builtins/arm/nesf2vfp.S @@ -12,7 +12,7 @@ // extern int __nesf2vfp(float a, float b); // // Returns one iff a != b and neither is NaN. -// Uses Darwin calling convention where single precision arguments are passsed +// Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/softfloat-alias.list b/compiler-rt/lib/builtins/arm/softfloat-alias.list index cc6a4b3cdd2..ab6ed21e54b 100644 --- a/compiler-rt/lib/builtins/arm/softfloat-alias.list +++ b/compiler-rt/lib/builtins/arm/softfloat-alias.list @@ -1,5 +1,5 @@ # -# These are soft float functions which can be +# These are soft float functions which can be # aliased to the *vfp functions on arm processors # that support floating point instructions. # diff --git a/compiler-rt/lib/builtins/arm/subdf3vfp.S b/compiler-rt/lib/builtins/arm/subdf3vfp.S index bbd41aea9db..f4eaf9af1af 100644 --- a/compiler-rt/lib/builtins/arm/subdf3vfp.S +++ b/compiler-rt/lib/builtins/arm/subdf3vfp.S @@ -11,7 +11,7 @@ // // extern double __subdf3vfp(double a, double b); // -// Returns difference between two double precision floating point numbers using +// Returns difference between two double precision floating point numbers using // the Darwin calling convention where double arguments are passsed in GPR pairs // .syntax unified @@ -22,7 +22,7 @@ DEFINE_COMPILERRT_FUNCTION(__subdf3vfp) #else vmov d6, r0, r1 // move first param from r0/r1 pair into d6 vmov d7, r2, r3 // move second param from r2/r3 pair into d7 - vsub.f64 d6, d6, d7 + vsub.f64 d6, d6, d7 vmov r0, r1, d6 // move result back to r0/r1 pair #endif bx lr diff --git a/compiler-rt/lib/builtins/arm/sync-ops.h b/compiler-rt/lib/builtins/arm/sync-ops.h index d86f25a313d..5bb863d8cf9 100644 --- a/compiler-rt/lib/builtins/arm/sync-ops.h +++ b/compiler-rt/lib/builtins/arm/sync-ops.h @@ -1,16 +1,16 @@ -/*===-- sync-ops.h - --===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements outline macros for the __sync_fetch_and_* - * operations. Different instantiations will generate appropriate assembly for - * ARM and Thumb-2 versions of the functions. - * - *===----------------------------------------------------------------------===*/ +//===-- sync-ops.h - --===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements outline macros for the __sync_fetch_and_* +// operations. Different instantiations will generate appropriate assembly for +// ARM and Thumb-2 versions of the functions. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_add_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_add_4.S index fe6dc138064..0d55975b7a3 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_add_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_add_4.S @@ -1,19 +1,19 @@ -/*===-- sync_fetch_and_add_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_add_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_add_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_add_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" -/* "adds" is 2 bytes shorter than "add". */ +// "adds" is 2 bytes shorter than "add". #define add_4(rD, rN, rM) add rD, rN, rM SYNC_OP_4(add_4) diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_add_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_add_8.S index 2f13bab9620..18bdd875b8b 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_add_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_add_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_add_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_add_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_add_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_add_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_and_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_and_4.S index d6bbe2f9110..3a76acca671 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_and_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_and_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_and_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_and_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_and_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_and_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_and_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_and_8.S index 8c7be4dbe45..3716eff809d 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_and_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_and_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_and_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_and_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_and_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_and_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_max_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_max_4.S index 9fe814fa7a0..b9cee45219d 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_max_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_max_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_max_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_max_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_max_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_max_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_max_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_max_8.S index a15f7e0cc04..06115ab5524 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_max_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_max_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_max_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_max_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_max_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_max_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_min_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_min_4.S index 2895fb9fb7b..60d435a0bd3 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_min_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_min_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_min_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_min_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_min_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_min_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_min_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_min_8.S index f16e2ade1e1..4f3e299d95c 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_min_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_min_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_min_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_min_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_min_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_min_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_4.S index 336e22ae3db..5a04be0f645 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_nand_4.S - -----------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_nand_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_nand_4.S - -----------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_nand_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_8.S index 855b3f94ec8..425c94474af 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_nand_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_nand_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_nand_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_nand_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_nand_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_or_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_or_4.S index 34de77b337c..f44751b9a9f 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_or_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_or_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_or_4.S - -------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_or_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_or_4.S - -------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_or_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_or_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_or_8.S index 456cd7cb6c6..4f18dcf84df 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_or_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_or_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_or_8.S - -------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_or_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_or_8.S - -------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_or_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_4.S index e2b12347c50..999d48c28ae 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_4.S @@ -1,19 +1,19 @@ -/*===-- sync_fetch_and_sub_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_sub_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_sub_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_sub_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" -/* "subs" is 2 bytes shorter than "sub". */ +// "subs" is 2 bytes shorter than "sub". #define sub_4(rD, rN, rM) sub rD, rN, rM SYNC_OP_4(sub_4) diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_8.S index 123aec1d0aa..25a4a107655 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_sub_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_sub_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_sub_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_sub_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_sub_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_4.S index 12ef3b60fc7..a7b233b1530 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_umax_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_umax_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_umax_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_umax_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_8.S index 4319b49b074..aa5213ff1de 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_umax_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_umax_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_umax_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_umax_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_umax_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_4.S index f384db6d387..c7a9c89df60 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_umin_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_umin_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_umin_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_umin_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_8.S index a47142fa0c8..8b40541ab47 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_umin_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_umin_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_umin_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_umin_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_umin_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_4.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_4.S index 8143973cbd0..f509191d017 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_4.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_4.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_xor_4.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_xor_4 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_xor_4.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_xor_4 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_8.S b/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_8.S index ce861d4c787..7436eb1d4ca 100644 --- a/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_8.S +++ b/compiler-rt/lib/builtins/arm/sync_fetch_and_xor_8.S @@ -1,15 +1,15 @@ -/*===-- sync_fetch_and_xor_8.S - ------------------------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __sync_fetch_and_xor_8 function for the ARM - * architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- sync_fetch_and_xor_8.S - ------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __sync_fetch_and_xor_8 function for the ARM +// architecture. +// +//===----------------------------------------------------------------------===// #include "sync-ops.h" diff --git a/compiler-rt/lib/builtins/arm/sync_synchronize.S b/compiler-rt/lib/builtins/arm/sync_synchronize.S index 064e4f93e0a..dd06e7191f9 100644 --- a/compiler-rt/lib/builtins/arm/sync_synchronize.S +++ b/compiler-rt/lib/builtins/arm/sync_synchronize.S @@ -8,12 +8,10 @@ #include "../assembly.h" -// // When compiling a use of the gcc built-in __sync_synchronize() in thumb1 mode -// the compiler may emit a call to __sync_synchronize. -// On Darwin the implementation jumps to an OS supplied function named +// the compiler may emit a call to __sync_synchronize. +// On Darwin the implementation jumps to an OS supplied function named // OSMemoryBarrier -// .text .syntax unified @@ -30,7 +28,7 @@ END_COMPILERRT_FUNCTION(__sync_synchronize) // tell linker it can break up file at label boundaries .subsections_via_symbols - + #endif NO_EXEC_STACK_DIRECTIVE diff --git a/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S b/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S index 06f3f21cdd1..a3c0a73466e 100644 --- a/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/truncdfsf2vfp.S @@ -12,7 +12,7 @@ // extern float __truncdfsf2vfp(double a); // // Converts double precision float to signle precision result. -// Uses Darwin calling convention where a double precision parameter is +// Uses Darwin calling convention where a double precision parameter is // passed in a R0/R1 pair and a signle precision result is returned in R0. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/udivmodsi4.S b/compiler-rt/lib/builtins/arm/udivmodsi4.S index 17a25800048..0f40575fe99 100644 --- a/compiler-rt/lib/builtins/arm/udivmodsi4.S +++ b/compiler-rt/lib/builtins/arm/udivmodsi4.S @@ -1,15 +1,15 @@ -/*===-- udivmodsi4.S - 32-bit unsigned integer divide and modulus ---------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __udivmodsi4 (32-bit unsigned integer divide and - * modulus) function for the ARM 32-bit architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- udivmodsi4.S - 32-bit unsigned integer divide and modulus ---------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __udivmodsi4 (32-bit unsigned integer divide and +// modulus) function for the ARM 32-bit architecture. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" @@ -38,26 +38,25 @@ DEFINE_COMPILERRT_FUNCTION(__udivmodsi4) beq LOCAL_LABEL(divby1) cmp r0, r1 bcc LOCAL_LABEL(quotient0) - /* - * Implement division using binary long division algorithm. - * - * r0 is the numerator, r1 the denominator. - * - * The code before JMP computes the correct shift I, so that - * r0 and (r1 << I) have the highest bit set in the same position. - * At the time of JMP, ip := .Ldiv0block - 12 * I. - * This depends on the fixed instruction size of block. - * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes. - * - * block(shift) implements the test-and-update-quotient core. - * It assumes (r0 << shift) can be computed without overflow and - * that (r0 << shift) < 2 * r1. The quotient is stored in r3. - */ + + // Implement division using binary long division algorithm. + // + // r0 is the numerator, r1 the denominator. + // + // The code before JMP computes the correct shift I, so that + // r0 and (r1 << I) have the highest bit set in the same position. + // At the time of JMP, ip := .Ldiv0block - 12 * I. + // This depends on the fixed instruction size of block. + // For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes. + // + // block(shift) implements the test-and-update-quotient core. + // It assumes (r0 << shift) can be computed without overflow and + // that (r0 << shift) < 2 * r1. The quotient is stored in r3. # ifdef __ARM_FEATURE_CLZ clz ip, r0 clz r3, r1 - /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */ + // r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. sub r3, r3, ip # if defined(USE_THUMB_2) adr ip, LOCAL_LABEL(div0block) + 1 @@ -98,11 +97,11 @@ DEFINE_COMPILERRT_FUNCTION(__udivmodsi4) movhs r4, r3 subhs ip, ip, #(2 * 12) - /* Last block, no need to update r3 or r4. */ + // Last block, no need to update r3 or r4. cmp r1, r4, lsr #1 subls ip, ip, #(1 * 12) - ldr r4, [sp], #8 /* restore r4, we are done with it. */ + ldr r4, [sp], #8 // restore r4, we are done with it. mov r3, #0 JMP(ip) @@ -163,7 +162,7 @@ LOCAL_LABEL(divby1): mov r3, #0 str r3, [r2] JMP(lr) -#endif /* __ARM_ARCH_EXT_IDIV__ */ +#endif // __ARM_ARCH_EXT_IDIV__ LOCAL_LABEL(divby0): mov r0, #0 diff --git a/compiler-rt/lib/builtins/arm/udivsi3.S b/compiler-rt/lib/builtins/arm/udivsi3.S index d310d8129f5..9b1b035b33d 100644 --- a/compiler-rt/lib/builtins/arm/udivsi3.S +++ b/compiler-rt/lib/builtins/arm/udivsi3.S @@ -1,15 +1,15 @@ -/*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __udivsi3 (32-bit unsigned integer divide) - * function for the ARM 32-bit architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __udivsi3 (32-bit unsigned integer divide) +// function for the ARM 32-bit architecture. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" @@ -39,7 +39,7 @@ LOCAL_LABEL(divby0): JMP(lr) # endif -#else /* ! __ARM_ARCH_EXT_IDIV__ */ +#else // ! __ARM_ARCH_EXT_IDIV__ cmp r1, #1 bcc LOCAL_LABEL(divby0) #if defined(USE_THUMB_1) @@ -62,26 +62,24 @@ LOCAL_LABEL(num_ge_denom): JMPc(lr, cc) #endif - /* - * Implement division using binary long division algorithm. - * - * r0 is the numerator, r1 the denominator. - * - * The code before JMP computes the correct shift I, so that - * r0 and (r1 << I) have the highest bit set in the same position. - * At the time of JMP, ip := .Ldiv0block - 12 * I. - * This depends on the fixed instruction size of block. - * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes. - * - * block(shift) implements the test-and-update-quotient core. - * It assumes (r0 << shift) can be computed without overflow and - * that (r0 << shift) < 2 * r1. The quotient is stored in r3. - */ + // Implement division using binary long division algorithm. + // + // r0 is the numerator, r1 the denominator. + // + // The code before JMP computes the correct shift I, so that + // r0 and (r1 << I) have the highest bit set in the same position. + // At the time of JMP, ip := .Ldiv0block - 12 * I. + // This depends on the fixed instruction size of block. + // For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes. + // + // block(shift) implements the test-and-update-quotient core. + // It assumes (r0 << shift) can be computed without overflow and + // that (r0 << shift) < 2 * r1. The quotient is stored in r3. # if defined(__ARM_FEATURE_CLZ) clz ip, r0 clz r3, r1 - /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */ + // r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. sub r3, r3, ip # if defined(USE_THUMB_2) adr ip, LOCAL_LABEL(div0block) + 1 @@ -93,7 +91,7 @@ LOCAL_LABEL(num_ge_denom): sub ip, ip, r3, lsl #3 mov r3, #0 bx ip -# else /* No CLZ Feature */ +# else // No CLZ Feature # if defined(USE_THUMB_2) # error THUMB mode requires CLZ or UDIV # endif @@ -159,7 +157,7 @@ LOCAL_LABEL(skip_2): subhs ip, ip, #(2 * BLOCK_SIZE) # endif - /* Last block, no need to update r2 or r3. */ + // Last block, no need to update r2 or r3. # if defined(USE_THUMB_1) lsrs r3, r2, #1 cmp r3, r1 @@ -179,12 +177,12 @@ LOCAL_LABEL(skip_1): JMP(ip) # endif -# endif /* __ARM_FEATURE_CLZ */ +# endif // __ARM_FEATURE_CLZ #define IMM # - /* due to the range limit of branch in Thumb1, we have to place the - block closer */ + // due to the range limit of branch in Thumb1, we have to place the + // block closer LOCAL_LABEL(divby0): movs r0, #0 # if defined(__ARM_EABI__) @@ -203,13 +201,13 @@ LOCAL_LABEL(divby0): blo LOCAL_LABEL(block_skip_##shift); \ subs r0, r0, r2; \ LOCAL_LABEL(block_skip_##shift) :; \ - adcs r3, r3 /* same as ((r3 << 1) | Carry). Carry is set if r0 >= r2. */ + adcs r3, r3 // same as ((r3 << 1) | Carry). Carry is set if r0 >= r2. - /* TODO: if current location counter is not not word aligned, we don't - need the .p2align and nop */ - /* Label div0block must be word-aligned. First align block 31 */ + // TODO: if current location counter is not not word aligned, we don't + // need the .p2align and nop + // Label div0block must be word-aligned. First align block 31 .p2align 2 - nop /* Padding to align div0block as 31 blocks = 310 bytes */ + nop // Padding to align div0block as 31 blocks = 310 bytes #else #define block(shift) \ @@ -255,7 +253,7 @@ LOCAL_LABEL(div0block): mov r0, r3 JMP(lr) -#endif /* __ARM_ARCH_EXT_IDIV__ */ +#endif // __ARM_ARCH_EXT_IDIV__ END_COMPILERRT_FUNCTION(__udivsi3) diff --git a/compiler-rt/lib/builtins/arm/umodsi3.S b/compiler-rt/lib/builtins/arm/umodsi3.S index 261a5c74cbd..5ab78de1785 100644 --- a/compiler-rt/lib/builtins/arm/umodsi3.S +++ b/compiler-rt/lib/builtins/arm/umodsi3.S @@ -1,15 +1,15 @@ -/*===-- umodsi3.S - 32-bit unsigned integer modulus -----------------------===// - * - * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. - * See https://llvm.org/LICENSE.txt for license information. - * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception - * - *===----------------------------------------------------------------------===// - * - * This file implements the __umodsi3 (32-bit unsigned integer modulus) - * function for the ARM 32-bit architecture. - * - *===----------------------------------------------------------------------===*/ +//===-- umodsi3.S - 32-bit unsigned integer modulus -----------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file implements the __umodsi3 (32-bit unsigned integer modulus) +// function for the ARM 32-bit architecture. +// +//===----------------------------------------------------------------------===// #include "../assembly.h" @@ -37,26 +37,25 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3) cmp r0, r1 IT(cc) JMPc(lr, cc) - /* - * Implement division using binary long division algorithm. - * - * r0 is the numerator, r1 the denominator. - * - * The code before JMP computes the correct shift I, so that - * r0 and (r1 << I) have the highest bit set in the same position. - * At the time of JMP, ip := .Ldiv0block - 8 * I. - * This depends on the fixed instruction size of block. - * For ARM mode, this is 8 Bytes, for THUMB mode 10 Bytes. - * - * block(shift) implements the test-and-update-quotient core. - * It assumes (r0 << shift) can be computed without overflow and - * that (r0 << shift) < 2 * r1. The quotient is stored in r3. - */ + + // Implement division using binary long division algorithm. + // + // r0 is the numerator, r1 the denominator. + // + // The code before JMP computes the correct shift I, so that + // r0 and (r1 << I) have the highest bit set in the same position. + // At the time of JMP, ip := .Ldiv0block - 8 * I. + // This depends on the fixed instruction size of block. + // For ARM mode, this is 8 Bytes, for THUMB mode 10 Bytes. + // + // block(shift) implements the test-and-update-quotient core. + // It assumes (r0 << shift) can be computed without overflow and + // that (r0 << shift) < 2 * r1. The quotient is stored in r3. # ifdef __ARM_FEATURE_CLZ clz ip, r0 clz r3, r1 - /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */ + // r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. sub r3, r3, ip # if defined(USE_THUMB_2) adr ip, LOCAL_LABEL(div0block) + 1 @@ -93,7 +92,7 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3) movhs r2, r3 subhs ip, ip, #(2 * 8) - /* Last block, no need to update r2 or r3. */ + // Last block, no need to update r2 or r3. cmp r1, r2, lsr #1 subls ip, ip, #(1 * 8) @@ -141,7 +140,7 @@ DEFINE_COMPILERRT_FUNCTION(__umodsi3) LOCAL_LABEL(div0block): block(0) JMP(lr) -#endif /* __ARM_ARCH_EXT_IDIV__ */ +#endif // __ARM_ARCH_EXT_IDIV__ LOCAL_LABEL(divby0): mov r0, #0 diff --git a/compiler-rt/lib/builtins/arm/unorddf2vfp.S b/compiler-rt/lib/builtins/arm/unorddf2vfp.S index d5f51d4a32c..ea36a1cb559 100644 --- a/compiler-rt/lib/builtins/arm/unorddf2vfp.S +++ b/compiler-rt/lib/builtins/arm/unorddf2vfp.S @@ -12,7 +12,7 @@ // extern int __unorddf2vfp(double a, double b); // // Returns one iff a or b is NaN -// Uses Darwin calling convention where double precision arguments are passsed +// Uses Darwin calling convention where double precision arguments are passsed // like in GPR pairs. // .syntax unified diff --git a/compiler-rt/lib/builtins/arm/unordsf2vfp.S b/compiler-rt/lib/builtins/arm/unordsf2vfp.S index 05ac67af148..7311297329d 100644 --- a/compiler-rt/lib/builtins/arm/unordsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/unordsf2vfp.S @@ -12,7 +12,7 @@ // extern int __unordsf2vfp(float a, float b); // // Returns one iff a or b is NaN -// Uses Darwin calling convention where single precision arguments are passsed +// Uses Darwin calling convention where single precision arguments are passsed // like 32-bit ints // .syntax unified |
