4 files changed, 54 insertions, 7 deletions
diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h
index 3e24cf35c1b..d73b3a8eda1 100644
--- a/clang/lib/Headers/emmintrin.h
+++ b/clang/lib/Headers/emmintrin.h
@@ -2457,7 +2457,11 @@ _mm_stream_si64(long long *__p, long long __a)
 /// \param __p
 ///    A pointer to the memory location used to identify the cache line to be
 ///    flushed.
-void _mm_clflush(void const *);
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_clflush(void const *__p)
+{
+  __builtin_ia32_clflush(__p);
+}
 
 /// \brief Forces strong memory ordering (serialization) between load
 ///    instructions preceding this instruction and load instructions following
@@ -2468,7 +2472,11 @@ void _mm_clflush(void const *);
 ///
 /// This intrinsic corresponds to the \c LFENCE instruction.
 ///
-void _mm_lfence(void);
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_lfence(void)
+{
+  __builtin_ia32_lfence();
+}
 
 /// \brief Forces strong memory ordering (serialization) between load and store
 ///    instructions preceding this instruction and load and store instructions
@@ -2479,7 +2487,11 @@ void _mm_lfence(void);
 ///
 /// This intrinsic corresponds to the \c MFENCE instruction.
 ///
-void _mm_mfence(void);
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_mfence(void)
+{
+  __builtin_ia32_mfence();
+}
 
 /// \brief Converts 16-bit signed integers from both 128-bit integer vector
 ///    operands into 8-bit signed integers, and packs the results into the
@@ -3201,7 +3213,11 @@ _mm_castsi128_pd(__m128i __a)
 ///
 /// This intrinsic corresponds to the \c PAUSE instruction.
 ///
-void _mm_pause(void);
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_pause(void)
+{
+  __builtin_ia32_pause();
+}
 
 #undef __DEFAULT_FN_ATTRS
 
diff --git a/clang/lib/Headers/ia32intrin.h b/clang/lib/Headers/ia32intrin.h
index 4928300103a..397f3fd13e0 100644
--- a/clang/lib/Headers/ia32intrin.h
+++ b/clang/lib/Headers/ia32intrin.h
@@ -60,6 +60,12 @@ __rdpmc(int __A) {
   return __builtin_ia32_rdpmc(__A);
 }
 
+/* __rdtsc */
+static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
+__rdtsc(void) {
+  return __builtin_ia32_rdtsc();
+}
+
 /* __rdtscp */
 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
 __rdtscp(unsigned int *__A) {
diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index fc00401d138..d0b500e9914 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -463,6 +463,14 @@ _BitScanReverse(unsigned long *_Index, unsigned long _Mask) {
   *_Index = 31 - __builtin_clzl(_Mask);
   return 1;
 }
+static __inline__ unsigned short __DEFAULT_FN_ATTRS
+__popcnt16(unsigned short _Value) {
+  return __builtin_popcount((int)_Value);
+}
+static __inline__ unsigned int __DEFAULT_FN_ATTRS
+__popcnt(unsigned int _Value) {
+  return __builtin_popcount(_Value);
+}
 static __inline__ unsigned char __DEFAULT_FN_ATTRS
 _bittest(long const *_BitBase, long _BitPos) {
   return (*_BitBase >> _BitPos) & 1;
@@ -505,6 +513,11 @@ _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask) {
   *_Index = 63 - __builtin_clzll(_Mask);
   return 1;
 }
+static __inline__
+unsigned __int64 __DEFAULT_FN_ATTRS
+__popcnt64(unsigned __int64 _Value) {
+  return __builtin_popcountll(_Value);
+}
 static __inline__ unsigned char __DEFAULT_FN_ATTRS
 _bittest64(__int64 const *_BitBase, __int64 _BitPos) {
   return (*_BitBase >> _BitPos) & 1;
diff --git a/clang/lib/Headers/xmmintrin.h b/clang/lib/Headers/xmmintrin.h
index 2688da0f992..373fc76aa7c 100644
--- a/clang/lib/Headers/xmmintrin.h
+++ b/clang/lib/Headers/xmmintrin.h
@@ -2094,7 +2094,11 @@ _mm_stream_ps(float *__p, __m128 __a)
 ///
 /// This intrinsic corresponds to the \c SFENCE instruction.
 ///
-void _mm_sfence(void);
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_sfence(void)
+{
+  __builtin_ia32_sfence();
+}
 
 /// \brief Extracts 16-bit element from a 64-bit vector of [4 x i16] and
 ///    returns it, as specified by the immediate integer operand.
@@ -2404,7 +2408,11 @@ _mm_sad_pu8(__m64 __a, __m64 __b)
 ///
 /// \returns A 32-bit unsigned integer containing the contents of the MXCSR
 ///    register.
-unsigned int _mm_getcsr(void);
+static __inline__ unsigned int __DEFAULT_FN_ATTRS
+_mm_getcsr(void)
+{
+  return __builtin_ia32_stmxcsr();
+}
 
 /// \brief Sets the MXCSR register with the 32-bit unsigned integer value. There
 ///    are several groups of macros associated with this intrinsic, including:
@@ -2442,7 +2450,11 @@ unsigned int _mm_getcsr(void);
 ///
 /// \param __i
 ///    A 32-bit unsigned integer value to be written to the MXCSR register.
-void _mm_setcsr(unsigned int);
+static __inline__ void __DEFAULT_FN_ATTRS
+_mm_setcsr(unsigned int __i)
+{
+  __builtin_ia32_ldmxcsr(__i);
+}
 
 /// \brief Selects 4 float values from the 128-bit operands of [4 x float], as
 ///    specified by the immediate value operand.