diff options
Diffstat (limited to 'clang/lib/Basic/Targets.cpp')
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index 4dac1046e67..ae6c2e616e7 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -851,8 +851,9 @@ public: ArchDefinePwr6x = 1 << 10, ArchDefinePwr7 = 1 << 11, ArchDefinePwr8 = 1 << 12, - ArchDefineA2 = 1 << 13, - ArchDefineA2q = 1 << 14 + ArchDefinePwr9 = 1 << 13, + ArchDefineA2 = 1 << 14, + ArchDefineA2q = 1 << 15 } ArchDefineTypes; // Note: GCC recognizes the following additional cpus: @@ -901,6 +902,8 @@ public: .Case("pwr7", true) .Case("power8", true) .Case("pwr8", true) + .Case("power9", true) + .Case("pwr9", true) .Case("powerpc", true) .Case("ppc", true) .Case("powerpc64", true) @@ -1195,6 +1198,10 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, .Case("pwr8", ArchDefineName | ArchDefinePwr7 | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) + .Case("pwr9", ArchDefineName | ArchDefinePwr8 | ArchDefinePwr7 + | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x + | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr + | ArchDefinePpcsq) .Case("power3", ArchDefinePpcgr) .Case("power4", ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) .Case("power5", ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr @@ -1212,6 +1219,10 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, .Case("power8", ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) + .Case("power9", ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 + | ArchDefinePwr6x | ArchDefinePwr6 | ArchDefinePwr5x + | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr + | ArchDefinePpcsq) .Default(ArchDefineNone); if (defs & ArchDefineName) @@ -1240,6 +1251,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("_ARCH_PWR7"); if (defs & ArchDefinePwr8) Builder.defineMacro("_ARCH_PWR8"); + if (defs & ArchDefinePwr9) + Builder.defineMacro("_ARCH_PWR9"); if (defs & ArchDefineA2) Builder.defineMacro("_ARCH_A2"); if (defs & ArchDefineA2q) { @@ -1339,6 +1352,7 @@ bool PPCTargetInfo::initFeatureMap( .Case("pwr6", true) .Case("pwr7", true) .Case("pwr8", true) + .Case("pwr9", true) .Case("ppc64", true) .Case("ppc64le", true) .Default(false); @@ -1346,28 +1360,34 @@ bool PPCTargetInfo::initFeatureMap( Features["qpx"] = (CPU == "a2q"); Features["crypto"] = llvm::StringSwitch<bool>(CPU) .Case("ppc64le", true) + .Case("pwr9", true) .Case("pwr8", true) .Default(false); Features["power8-vector"] = llvm::StringSwitch<bool>(CPU) .Case("ppc64le", true) + .Case("pwr9", true) .Case("pwr8", true) .Default(false); Features["bpermd"] = llvm::StringSwitch<bool>(CPU) .Case("ppc64le", true) + .Case("pwr9", true) .Case("pwr8", true) .Case("pwr7", true) .Default(false); Features["extdiv"] = llvm::StringSwitch<bool>(CPU) .Case("ppc64le", true) + .Case("pwr9", true) .Case("pwr8", true) .Case("pwr7", true) .Default(false); Features["direct-move"] = llvm::StringSwitch<bool>(CPU) .Case("ppc64le", true) + .Case("pwr9", true) .Case("pwr8", true) .Default(false); Features["vsx"] = llvm::StringSwitch<bool>(CPU) .Case("ppc64le", true) + .Case("pwr9", true) .Case("pwr8", true) .Case("pwr7", true) .Default(false); |
