diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/fmul-combines.ll | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/fmul-combines.ll b/llvm/test/CodeGen/X86/fmul-combines.ll index e650ab08c01..dbc3e18f334 100644 --- a/llvm/test/CodeGen/X86/fmul-combines.ll +++ b/llvm/test/CodeGen/X86/fmul-combines.ll @@ -1,6 +1,35 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s +define <4 x float> @fmul_zero_not_fast(<4 x float> %x) nounwind { +; CHECK-LABEL: fmul_zero_not_fast: +; CHECK: # %bb.0: +; CHECK-NEXT: xorps %xmm1, %xmm1 +; CHECK-NEXT: mulps %xmm1, %xmm0 +; CHECK-NEXT: retq + %r = fmul <4 x float> %x, zeroinitializer + ret <4 x float> %r +} + +define <4 x float> @fmul_zero_nsz_nnan(<4 x float> %x) nounwind { +; CHECK-LABEL: fmul_zero_nsz_nnan: +; CHECK: # %bb.0: +; CHECK-NEXT: xorps %xmm0, %xmm0 +; CHECK-NEXT: retq + %r = fmul nsz nnan <4 x float> %x, zeroinitializer + ret <4 x float> %r +} + +define <4 x float> @fmul_zero_nsz_nnan_undef(<4 x float> %x) nounwind { +; CHECK-LABEL: fmul_zero_nsz_nnan_undef: +; CHECK: # %bb.0: +; CHECK-NEXT: xorps %xmm1, %xmm1 +; CHECK-NEXT: mulps %xmm1, %xmm0 +; CHECK-NEXT: retq + %r = fmul nsz nnan <4 x float> %x, <float 0.0, float 0.0, float 0.0, float undef> + ret <4 x float> %r +} + define float @fmul2_f32(float %x) { ; CHECK-LABEL: fmul2_f32: ; CHECK: # %bb.0: @@ -21,6 +50,15 @@ define <4 x float> @fmul2_v4f32(<4 x float> %x) { ret <4 x float> %y } +define <4 x float> @fmul2_v4f32_undef(<4 x float> %x) { +; CHECK-LABEL: fmul2_v4f32_undef: +; CHECK: # %bb.0: +; CHECK-NEXT: mulps {{.*}}(%rip), %xmm0 +; CHECK-NEXT: retq + %y = fmul <4 x float> %x, <float undef, float 2.0, float 2.0, float 2.0> + ret <4 x float> %y +} + define <4 x float> @constant_fold_fmul_v4f32(<4 x float> %x) { ; CHECK-LABEL: constant_fold_fmul_v4f32: ; CHECK: # %bb.0: @@ -30,6 +68,15 @@ define <4 x float> @constant_fold_fmul_v4f32(<4 x float> %x) { ret <4 x float> %y } +define <4 x float> @constant_fold_fmul_v4f32_undef(<4 x float> %x) { +; CHECK-LABEL: constant_fold_fmul_v4f32_undef: +; CHECK: # %bb.0: +; CHECK-NEXT: movaps {{.*#+}} xmm0 = [8,NaN,8,NaN] +; CHECK-NEXT: retq + %y = fmul <4 x float> <float 4.0, float undef, float 4.0, float 4.0>, <float 2.0, float 2.0, float 2.0, float undef> + ret <4 x float> %y +} + define <4 x float> @fmul0_v4f32(<4 x float> %x) #0 { ; CHECK-LABEL: fmul0_v4f32: ; CHECK: # %bb.0: @@ -39,6 +86,16 @@ define <4 x float> @fmul0_v4f32(<4 x float> %x) #0 { ret <4 x float> %y } +define <4 x float> @fmul0_v4f32_undef(<4 x float> %x) #0 { +; CHECK-LABEL: fmul0_v4f32_undef: +; CHECK: # %bb.0: +; CHECK-NEXT: xorps %xmm1, %xmm1 +; CHECK-NEXT: mulps %xmm1, %xmm0 +; CHECK-NEXT: retq + %y = fmul <4 x float> %x, <float undef, float 0.0, float undef, float 0.0> + ret <4 x float> %y +} + define <4 x float> @fmul_c2_c4_v4f32(<4 x float> %x) #0 { ; CHECK-LABEL: fmul_c2_c4_v4f32: ; CHECK: # %bb.0: |
