summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.cpp37
-rw-r--r--llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll12
-rw-r--r--llvm/test/CodeGen/Mips/fcopysign.ll15
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dext-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dext-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextm-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextm-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-pos.mir4
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir49
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dextu-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dins-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dins-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsm-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/dinsu-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ext-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ext-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ins-pos.mir2
-rw-r--r--llvm/test/CodeGen/Mips/instverify/ins-size.mir2
27 files changed, 50 insertions, 111 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index 51ddc0d44c0..1bfd21c02db 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -538,19 +538,15 @@ bool MipsInstrInfo::findCommutedOpIndices(MachineInstr &MI, unsigned &SrcOpIdx1,
}
// ins, ext, dext*, dins have the following constraints:
-// X <= pos < Y
-// X < size <= Y
-// X < pos+size <= Y
+// 0 <= pos < X
+// 0 < size <= X
+// 0 < pos+size <= x
//
-// dinsm and dinsu have the following constraints:
-// X <= pos < Y
-// X <= size <= Y
-// X < pos+size <= Y
-//
-// The callee of verifyInsExtInstruction however gives the bounds of
-// dins[um] like the other (d)ins (d)ext(um) instructions, so that this
-// function doesn't have to vary it's behaviour based on the instruction
-// being checked.
+// dinsm and dinsm have the following contraints:
+// 0 <= pos < X
+// 0 <= size <= X
+// 0 < pos+size <= x
+
static bool verifyInsExtInstruction(const MachineInstr &MI, StringRef &ErrInfo,
const int64_t PosLow, const int64_t PosHigh,
const int64_t SizeLow,
@@ -599,18 +595,15 @@ bool MipsInstrInfo::verifyInstruction(const MachineInstr &MI,
case Mips::DINS:
return verifyInsExtInstruction(MI, ErrInfo, 0, 32, 0, 32, 0, 32);
case Mips::DINSM:
- // The ISA spec has a subtle difference difference between dinsm and dextm
- // in that it says:
- // 2 <= size <= 64 for 'dinsm' but 'dextm' has 32 < size <= 64.
- // To make the bounds checks similar, the range 1 < size <= 64 is checked
- // for 'dinsm'.
+ // The ISA spec has a subtle difference here in that it says:
+ // 2 <= size <= 64 for 'dinsm', so we change the bounds so that it
+ // is in line with the rest of instructions.
return verifyInsExtInstruction(MI, ErrInfo, 0, 32, 1, 64, 32, 64);
case Mips::DINSU:
- // The ISA spec has a subtle difference between dinsu and dextu in that
- // the size range of dinsu is specified as 1 <= size <= 32 whereas size
- // for dextu is 0 < size <= 32. The range checked for dinsu here is
- // 0 < size <= 32, which is equivalent and similar to dextu.
- return verifyInsExtInstruction(MI, ErrInfo, 32, 64, 0, 32, 32, 64);
+ // The ISA spec has a subtle difference here in that it says:
+ // 2 <= size <= 64 for 'dinsm', so we change the bounds so that it
+ // is in line with the rest of instructions.
+ return verifyInsExtInstruction(MI, ErrInfo, 32, 64, 1, 32, 32, 64);
case Mips::DEXT:
return verifyInsExtInstruction(MI, ErrInfo, 0, 32, 0, 32, 0, 63);
case Mips::DEXTM:
diff --git a/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll b/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll
index 695431a5ab6..9ec2b8e2425 100644
--- a/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll
+++ b/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips4 \
-; RUN: -target-abi=n64 | FileCheck %s -check-prefixes=ALL,64
-; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64 \
-; RUN: -target-abi=n64 | FileCheck %s -check-prefixes=ALL,64
-; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64r2 \
-; RUN: -target-abi=n64 | FileCheck %s -check-prefixes=ALL,64R2
+; RUN: llc < %s -march=mips64el -mcpu=mips4 -target-abi=n64 | \
+; RUN: FileCheck %s -check-prefixes=ALL,64
+; RUN: llc < %s -march=mips64el -mcpu=mips64 -target-abi=n64 | \
+; RUN: FileCheck %s -check-prefixes=ALL,64
+; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | \
+; RUN: FileCheck %s -check-prefixes=ALL,64R2
declare double @copysign(double, double) nounwind readnone
diff --git a/llvm/test/CodeGen/Mips/fcopysign.ll b/llvm/test/CodeGen/Mips/fcopysign.ll
index 810d0f95808..9be876f2a9b 100644
--- a/llvm/test/CodeGen/Mips/fcopysign.ll
+++ b/llvm/test/CodeGen/Mips/fcopysign.ll
@@ -1,13 +1,8 @@
-; RUN: llc < %s -verify-machineinstrs -march=mipsel -mcpu=mips32 \
-; RUN: | FileCheck %s -check-prefix=32
-; RUN: llc < %s -verify-machineinstrs -march=mipsel -mcpu=mips32r2 \
-; RUN: | FileCheck %s -check-prefix=32R2
-; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips4 -target-abi=n64 \
-; RUN: | FileCheck %s -check-prefix=64
-; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64 -target-abi=n64 \
-; RUN: | FileCheck %s -check-prefix=64
-; RUN: llc < %s -verify-machineinstrs -march=mips64el -mcpu=mips64r2 -target-abi=n64 \
-; RUN: | FileCheck %s -check-prefix=64R2
+; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s -check-prefix=32
+; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2
+; RUN: llc < %s -march=mips64el -mcpu=mips4 -target-abi=n64 | FileCheck %s -check-prefix=64
+; RUN: llc < %s -march=mips64el -mcpu=mips64 -target-abi=n64 | FileCheck %s -check-prefix=64
+; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s -check-prefix=64R2
define double @func0(double %d0, double %d1) nounwind readnone {
entry:
diff --git a/llvm/test/CodeGen/Mips/instverify/dext-pos.mir b/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
index 8e3b887ffe9..5b57564df70 100644
--- a/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dext-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 0..31
+# Check that the machine verifier checks the position operand is in range 0..31
---
name: dext
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dext-size.mir b/llvm/test/CodeGen/Mips/instverify/dext-size.mir
index 968dd4e370f..d6436108cef 100644
--- a/llvm/test/CodeGen/Mips/instverify/dext-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dext-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 1..32
+# Check that the machine verifier checks the size operand is in range 0..32
---
name: dext
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
index bdf82ecd0d6..eec459fef42 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-pos-size.mir
@@ -3,7 +3,7 @@
# CHECK: Position + Size is out of range!
-# Check that the machine verifier checks the pos + size is in the range 33..64
+# Check that the machine verifier checks the pos + size is in range 32..64
---
name: dextm
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir b/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
index 987a228a1f8..782d3fb8b65 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 0..31
+# Check that the machine verifier checks the position operand is in range 0..31
---
name: dextm
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dextm-size.mir b/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
index b1e367e027e..771abef6517 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextm-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 33..64
+# Check that the machine verifier checks the size operand is in range 32..64
---
name: dextm
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
index 9b6dac08350..5356cf5dfc1 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-pos-size.mir
@@ -3,7 +3,7 @@
# CHECK: Position + Size is out of range!
-# Check that the machine verifier checks the pos + size is in the range 33..64
+# Check that the machine verifier checks the pos + size is in range 32..64
---
name: dextu
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir b/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
index 65e5bd0e1c1..11b94c3fd8d 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 32..63
+# Check that the machine verifier checks the position operand is in range 32..63
---
name: dextu
alignment: 3
@@ -42,7 +42,7 @@ body: |
liveins: %a0_64
%0 = COPY %a0_64
- %1 = DEXTU %0, 64, 5
+ %1 = DEXTU %0, 65, 5
%v0_64 = COPY %1
RetRA implicit %v0_64
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir b/llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir
deleted file mode 100644
index 8c548f1c7b4..00000000000
--- a/llvm/test/CodeGen/Mips/instverify/dextu-size-valid.mir
+++ /dev/null
@@ -1,49 +0,0 @@
-# RUN: llc -march=mips64 -mcpu=mips64r2 -start-after=expand-isel-pseudos -stop-after=expand-isel-pseudos \
-# RUN: -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
-
-# CHECK-NOT: Size operand is out of range!
-
-# Check that the machine verifier checks the size operand is in the range 1..32
----
-name: dextu
-alignment: 3
-exposesReturnsTwice: false
-legalized: false
-regBankSelected: false
-selected: false
-tracksRegLiveness: true
-registers:
- - { id: 0, class: gpr64, preferred-register: '' }
- - { id: 1, class: gpr64, preferred-register: '' }
-liveins:
- - { reg: '%a0_64', virtual-reg: '%0' }
-frameInfo:
- isFrameAddressTaken: false
- isReturnAddressTaken: false
- hasStackMap: false
- hasPatchPoint: false
- stackSize: 0
- offsetAdjustment: 0
- maxAlignment: 1
- adjustsStack: false
- hasCalls: false
- stackProtector: ''
- maxCallFrameSize: 4294967295
- hasOpaqueSPAdjustment: false
- hasVAStart: false
- hasMustTailInVarArgFunc: false
- savePoint: ''
- restorePoint: ''
-fixedStack:
-stack:
-constants:
-body: |
- bb.0.entry:
- liveins: %a0_64
-
- %0 = COPY %a0_64
- %1 = DEXTU %0, 63, 1
- %v0_64 = COPY %1
- RetRA implicit %v0_64
-
-...
diff --git a/llvm/test/CodeGen/Mips/instverify/dextu-size.mir b/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
index 0511d1ae09d..4efdd966f7b 100644
--- a/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dextu-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 1..32
+# Check that the machine verifier checks the size operand is in range 0..32
---
name: dextu
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
index d1d178575c8..6276790edc5 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-pos-size.mir
@@ -3,7 +3,7 @@
# CHECK: Position + Size is out of range!
-# Check that the machine verifier checks the pos + size is in the range 1..32
+# Check that the machine verifier checks the pos + size is in range 0..32
---
name: dins
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-pos.mir b/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
index 1602aa2e25a..fe61deaebf0 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 0..31
+# Check that the machine verifier checks the position operand is in range 0..31
---
name: dins
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dins-size.mir b/llvm/test/CodeGen/Mips/instverify/dins-size.mir
index bf713bf992f..9fa0bc79a4b 100644
--- a/llvm/test/CodeGen/Mips/instverify/dins-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dins-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 1..32
+# Check that the machine verifier checks the size operand is in range 0..32
---
name: dins
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
index aa73e7f1a53..450aa6a5053 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-pos-size.mir
@@ -3,7 +3,7 @@
# CHECK: Position + Size is out of range!
-# Check that the machine verifier checks the pos + size is in the range 33..64
+# Check that the machine verifier checks the pos + size is in range 32..64
---
name: dinsu
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
index 66a6053ca74..75bf00edd96 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 0..31
+# Check that the machine verifier checks the position operand is in range 0..31
---
name: dinsm
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
index fba3bee969a..9b501d44c47 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsm-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 2..64
+# Check that the machine verifier checks the size operand is in range 2..64
---
name: dinsm
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
index 9d2d17c3c18..51a53041504 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-pos-size.mir
@@ -3,7 +3,7 @@
# CHECK: Position + Size is out of range!
-# Check that the machine verifier checks the pos + size is in the range 33..64
+# Check that the machine verifier checks the pos + size is in range 32..64
---
name: dinsu
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
index d89bb2de3ae..cbfae688b0a 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 32..63
+# Check that the machine verifier checks the position operand is in range 32..63
---
name: dinsu
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir b/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
index 550f890fbd8..048a6f01c80 100644
--- a/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/dinsu-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 1..32
+# Check that the machine verifier checks the size operand is in range 0..32
---
name: dinsu
alignment: 3
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
index 94edecd8d24..c230331e8ef 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-pos-size.mir
@@ -3,7 +3,7 @@
# CHECK: Position + Size is out of range!
-# Check that the machine verifier checks the pos + size is in the range 1..32
+# Check that the machine verifier checks the pos + size is in range 0..32
---
name: f
alignment: 2
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-pos.mir b/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
index 7cca1b6a1b3..ce472db2ef0 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 0..31
+# Check that the machine verifier checks the position operand is in range 0..31
---
name: f
alignment: 2
diff --git a/llvm/test/CodeGen/Mips/instverify/ext-size.mir b/llvm/test/CodeGen/Mips/instverify/ext-size.mir
index 4c35e1fb6a0..00f7182df4a 100644
--- a/llvm/test/CodeGen/Mips/instverify/ext-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ext-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 1..32
+# Check that the machine verifier checks the size operand is in range 0..32
---
name: f
alignment: 2
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir b/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
index e825b5997d8..95872364e07 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-pos-size.mir
@@ -3,7 +3,7 @@
# CHECK: Position + Size is out of range!
-# Check that the machine verifier checks the pos + size is in the range 1..32
+# Check that the machine verifier checks the pos + size is in range 0..32
---
name: f
alignment: 2
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-pos.mir b/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
index a284fdb5799..c8811ed3e20 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-pos.mir
@@ -3,7 +3,7 @@
# CHECK: Position operand is out of range!
-# Check that the machine verifier checks the position operand is in the range 0..31
+# Check that the machine verifier checks the position operand is in range 0..31
---
name: f
alignment: 2
diff --git a/llvm/test/CodeGen/Mips/instverify/ins-size.mir b/llvm/test/CodeGen/Mips/instverify/ins-size.mir
index 6cd839a01c6..fba25212e1a 100644
--- a/llvm/test/CodeGen/Mips/instverify/ins-size.mir
+++ b/llvm/test/CodeGen/Mips/instverify/ins-size.mir
@@ -3,7 +3,7 @@
# CHECK: Size operand is out of range!
-# Check that the machine verifier checks the size operand is in the range 1..32
+# Check that the machine verifier checks the size operand is in range 0..32
---
name: f
alignment: 2
OpenPOWER on IntegriCloud