diff options
| -rwxr-xr-x | llvm/lib/Target/X86/X86SchedBroadwell.td | 106 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedHaswell.td | 106 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedSandyBridge.td | 106 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedSkylakeClient.td | 106 | ||||
| -rwxr-xr-x | llvm/lib/Target/X86/X86SchedSkylakeServer.td | 106 |
5 files changed, 50 insertions, 480 deletions
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td index 4250fa8694a..3f707822f76 100755 --- a/llvm/lib/Target/X86/X86SchedBroadwell.td +++ b/llvm/lib/Target/X86/X86SchedBroadwell.td @@ -607,55 +607,12 @@ def: InstRW<[BWWriteResGroup6], (instregex "BTR(16|32|64)rr")>; def: InstRW<[BWWriteResGroup6], (instregex "BTS(16|32|64)ri8")>; def: InstRW<[BWWriteResGroup6], (instregex "BTS(16|32|64)rr")>; def: InstRW<[BWWriteResGroup6], (instregex "CDQ")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVAE(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVB(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVE(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVG(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVGE(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVL(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVLE(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVNE(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVNO(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVNP(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVNS(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVO(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVP(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup6], (instregex "CMOVS(16|32|64)rr")>; +def: InstRW<[BWWriteResGroup6], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>; def: InstRW<[BWWriteResGroup6], (instregex "CQO")>; -def: InstRW<[BWWriteResGroup6], (instregex "JAE_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JAE_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JA_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JA_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JBE_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JBE_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JB_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JB_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JE_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JE_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JGE_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JGE_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JG_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JG_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JLE_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JLE_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JL_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JL_4")>; +def: InstRW<[BWWriteResGroup6], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_1")>; +def: InstRW<[BWWriteResGroup6], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_4")>; def: InstRW<[BWWriteResGroup6], (instregex "JMP_1")>; def: InstRW<[BWWriteResGroup6], (instregex "JMP_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNE_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNE_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNO_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNO_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNP_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNP_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNS_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JNS_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JO_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JO_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JP_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JP_4")>; -def: InstRW<[BWWriteResGroup6], (instregex "JS_1")>; -def: InstRW<[BWWriteResGroup6], (instregex "JS_4")>; def: InstRW<[BWWriteResGroup6], (instregex "RORX(32|64)ri")>; def: InstRW<[BWWriteResGroup6], (instregex "SAR(16|32|64)r1")>; def: InstRW<[BWWriteResGroup6], (instregex "SAR(16|32|64)ri")>; @@ -665,20 +622,7 @@ def: InstRW<[BWWriteResGroup6], (instregex "SARX(32|64)rr")>; def: InstRW<[BWWriteResGroup6], (instregex "SBB(16|32|64)ri")>; def: InstRW<[BWWriteResGroup6], (instregex "SBB(16|32|64)rr(_REV)?")>; def: InstRW<[BWWriteResGroup6], (instregex "SBB8rr(_REV)?")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETAEr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETBr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETEr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETGEr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETGr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETLEr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETLr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETNEr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETNOr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETNPr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETNSr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETOr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETPr")>; -def: InstRW<[BWWriteResGroup6], (instregex "SETSr")>; +def: InstRW<[BWWriteResGroup6], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>; def: InstRW<[BWWriteResGroup6], (instregex "SHL(16|32|64)r1")>; def: InstRW<[BWWriteResGroup6], (instregex "SHL(16|32|64)ri")>; def: InstRW<[BWWriteResGroup6], (instregex "SHL8r1")>; @@ -1177,14 +1121,12 @@ def BWWriteResGroup20 : SchedWriteRes<[BWPort06,BWPort0156]> { } def: InstRW<[BWWriteResGroup20], (instregex "ADC8i8")>; def: InstRW<[BWWriteResGroup20], (instregex "ADC8ri")>; -def: InstRW<[BWWriteResGroup20], (instregex "CMOVA(16|32|64)rr")>; -def: InstRW<[BWWriteResGroup20], (instregex "CMOVBE(16|32|64)rr")>; +def: InstRW<[BWWriteResGroup20], (instregex "CMOV(A|BE)(16|32|64)rr")>; def: InstRW<[BWWriteResGroup20], (instregex "CWD")>; def: InstRW<[BWWriteResGroup20], (instregex "JRCXZ")>; def: InstRW<[BWWriteResGroup20], (instregex "SBB8i8")>; def: InstRW<[BWWriteResGroup20], (instregex "SBB8ri")>; -def: InstRW<[BWWriteResGroup20], (instregex "SETAr")>; -def: InstRW<[BWWriteResGroup20], (instregex "SETBEr")>; +def: InstRW<[BWWriteResGroup20], (instregex "SET(A|BE)r")>; def BWWriteResGroup21 : SchedWriteRes<[BWPort4,BWPort5,BWPort237]> { let Latency = 2; @@ -1216,20 +1158,7 @@ def BWWriteResGroup23 : SchedWriteRes<[BWPort4,BWPort237,BWPort06]> { let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[BWWriteResGroup23], (instregex "SETAEm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETBm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETEm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETGEm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETGm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETLEm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETLm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETNEm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETNOm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETNPm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETNSm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETOm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETPm")>; -def: InstRW<[BWWriteResGroup23], (instregex "SETSm")>; +def: InstRW<[BWWriteResGroup23], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)m")>; def BWWriteResGroup24 : SchedWriteRes<[BWPort4,BWPort237,BWPort15]> { let Latency = 2; @@ -1535,8 +1464,7 @@ def BWWriteResGroup38 : SchedWriteRes<[BWPort4,BWPort237,BWPort06,BWPort0156]> { let ResourceCycles = [1,1,1,1]; } def: InstRW<[BWWriteResGroup38], (instregex "CALL64pcrel32")>; -def: InstRW<[BWWriteResGroup38], (instregex "SETAm")>; -def: InstRW<[BWWriteResGroup38], (instregex "SETBEm")>; +def: InstRW<[BWWriteResGroup38], (instregex "SET(A|BE)m")>; def BWWriteResGroup39 : SchedWriteRes<[BWPort0,BWPort1]> { let Latency = 4; @@ -2075,20 +2003,7 @@ def: InstRW<[BWWriteResGroup63], (instregex "ADC8rm")>; def: InstRW<[BWWriteResGroup63], (instregex "ADCX(32|64)rm")>; def: InstRW<[BWWriteResGroup63], (instregex "ADOX(32|64)rm")>; def: InstRW<[BWWriteResGroup63], (instregex "BT(16|32|64)mi8")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVAE(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVB(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVE(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVG(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVGE(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVL(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVLE(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVNE(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVNO(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVNP(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVNS(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVO(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVP(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup63], (instregex "CMOVS(16|32|64)rm")>; +def: InstRW<[BWWriteResGroup63], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rm")>; def: InstRW<[BWWriteResGroup63], (instregex "RORX(32|64)mi")>; def: InstRW<[BWWriteResGroup63], (instregex "SARX(32|64)rm")>; def: InstRW<[BWWriteResGroup63], (instregex "SBB(16|32|64)rm")>; @@ -2602,8 +2517,7 @@ def BWWriteResGroup86 : SchedWriteRes<[BWPort23,BWPort06,BWPort0156]> { let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[BWWriteResGroup86], (instregex "CMOVA(16|32|64)rm")>; -def: InstRW<[BWWriteResGroup86], (instregex "CMOVBE(16|32|64)rm")>; +def: InstRW<[BWWriteResGroup86], (instregex "CMOV(A|BE)(16|32|64)rm")>; def BWWriteResGroup87 : SchedWriteRes<[BWPort4,BWPort23,BWPort237,BWPort06]> { let Latency = 7; diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index debde6f4411..35beb5a5730 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -1171,60 +1171,17 @@ def: InstRW<[HWWriteResGroup7], (instregex "BTS(16|32|64)ri8")>; def: InstRW<[HWWriteResGroup7], (instregex "BTS(16|32|64)rr")>; def: InstRW<[HWWriteResGroup7], (instregex "CDQ")>; def: InstRW<[HWWriteResGroup7], (instregex "CQO")>; -def: InstRW<[HWWriteResGroup7], (instregex "JAE_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JAE_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JA_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JA_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JBE_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JBE_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JB_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JB_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JE_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JE_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JGE_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JGE_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JG_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JG_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JLE_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JLE_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JL_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JL_4")>; +def: InstRW<[HWWriteResGroup7], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_1")>; +def: InstRW<[HWWriteResGroup7], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_4")>; def: InstRW<[HWWriteResGroup7], (instregex "JMP_1")>; def: InstRW<[HWWriteResGroup7], (instregex "JMP_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNE_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNE_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNO_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNO_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNP_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNP_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNS_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JNS_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JO_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JO_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JP_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JP_4")>; -def: InstRW<[HWWriteResGroup7], (instregex "JS_1")>; -def: InstRW<[HWWriteResGroup7], (instregex "JS_4")>; def: InstRW<[HWWriteResGroup7], (instregex "RORX(32|64)ri")>; def: InstRW<[HWWriteResGroup7], (instregex "SAR(16|32|64)r1")>; def: InstRW<[HWWriteResGroup7], (instregex "SAR(16|32|64)ri")>; def: InstRW<[HWWriteResGroup7], (instregex "SAR8r1")>; def: InstRW<[HWWriteResGroup7], (instregex "SAR8ri")>; def: InstRW<[HWWriteResGroup7], (instregex "SARX(32|64)rr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETAEr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETBr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETEr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETGEr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETGr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETLEr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETLr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETNEr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETNOr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETNPr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETNSr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETOr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETPr")>; -def: InstRW<[HWWriteResGroup7], (instregex "SETSr")>; +def: InstRW<[HWWriteResGroup7], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>; def: InstRW<[HWWriteResGroup7], (instregex "SHL(16|32|64)r1")>; def: InstRW<[HWWriteResGroup7], (instregex "SHL(16|32|64)ri")>; def: InstRW<[HWWriteResGroup7], (instregex "SHL8r1")>; @@ -2118,20 +2075,7 @@ def HWWriteResGroup22 : SchedWriteRes<[HWPort4,HWPort237,HWPort06]> { let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[HWWriteResGroup22], (instregex "SETAEm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETBm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETEm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETGEm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETGm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETLEm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETLm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETNEm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETNOm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETNPm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETNSm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETOm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETPm")>; -def: InstRW<[HWWriteResGroup22], (instregex "SETSm")>; +def: InstRW<[HWWriteResGroup22], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)m")>; def HWWriteResGroup23 : SchedWriteRes<[HWPort4,HWPort237,HWPort15]> { let Latency = 2; @@ -2346,20 +2290,7 @@ def: InstRW<[HWWriteResGroup35], (instregex "ADC(16|32|64)rr(_REV)?")>; def: InstRW<[HWWriteResGroup35], (instregex "ADC8i8")>; def: InstRW<[HWWriteResGroup35], (instregex "ADC8ri")>; def: InstRW<[HWWriteResGroup35], (instregex "ADC8rr(_REV)?")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVAE(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVB(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVE(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVG(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVGE(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVL(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVLE(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVNE(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVNO(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVNP(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVNS(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVO(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVP(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup35], (instregex "CMOVS(16|32|64)rr")>; +def: InstRW<[HWWriteResGroup35], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>; def: InstRW<[HWWriteResGroup35], (instregex "CWD")>; def: InstRW<[HWWriteResGroup35], (instregex "JRCXZ")>; def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)ri")>; @@ -2367,8 +2298,7 @@ def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)rr(_REV)?")>; def: InstRW<[HWWriteResGroup35], (instregex "SBB8i8")>; def: InstRW<[HWWriteResGroup35], (instregex "SBB8ri")>; def: InstRW<[HWWriteResGroup35], (instregex "SBB8rr(_REV)?")>; -def: InstRW<[HWWriteResGroup35], (instregex "SETAr")>; -def: InstRW<[HWWriteResGroup35], (instregex "SETBEr")>; +def: InstRW<[HWWriteResGroup35], (instregex "SET(A|BE)r")>; def HWWriteResGroup36 : SchedWriteRes<[HWPort5,HWPort23]> { let Latency = 8; @@ -2481,20 +2411,7 @@ def HWWriteResGroup43 : SchedWriteRes<[HWPort23,HWPort06,HWPort0156]> { } def: InstRW<[HWWriteResGroup43], (instregex "ADC(16|32|64)rm")>; def: InstRW<[HWWriteResGroup43], (instregex "ADC8rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVAE(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVB(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVE(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVG(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVGE(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVL(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVLE(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVNE(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVNO(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVNP(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVNS(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVO(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVP(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup43], (instregex "CMOVS(16|32|64)rm")>; +def: InstRW<[HWWriteResGroup43], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rm")>; def: InstRW<[HWWriteResGroup43], (instregex "SBB(16|32|64)rm")>; def: InstRW<[HWWriteResGroup43], (instregex "SBB8rm")>; @@ -2511,8 +2428,7 @@ def HWWriteResGroup45 : SchedWriteRes<[HWPort4,HWPort237,HWPort06,HWPort0156]> { let ResourceCycles = [1,1,1,1]; } def: InstRW<[HWWriteResGroup45], (instregex "CALL64pcrel32")>; -def: InstRW<[HWWriteResGroup45], (instregex "SETAm")>; -def: InstRW<[HWWriteResGroup45], (instregex "SETBEm")>; +def: InstRW<[HWWriteResGroup45], (instregex "SET(A|BE)m")>; def HWWriteResGroup46 : SchedWriteRes<[HWPort4,HWPort23,HWPort237,HWPort06]> { let Latency = 8; @@ -2873,8 +2789,7 @@ def HWWriteResGroup59 : SchedWriteRes<[HWPort06,HWPort0156]> { let NumMicroOps = 3; let ResourceCycles = [1,2]; } -def: InstRW<[HWWriteResGroup59], (instregex "CMOVA(16|32|64)rr")>; -def: InstRW<[HWWriteResGroup59], (instregex "CMOVBE(16|32|64)rr")>; +def: InstRW<[HWWriteResGroup59], (instregex "CMOV(A|BE)(16|32|64)rr")>; def: InstRW<[HWWriteResGroup59], (instregex "RCL(16|32|64)r1")>; def: InstRW<[HWWriteResGroup59], (instregex "RCL(16|32|64)ri")>; def: InstRW<[HWWriteResGroup59], (instregex "RCL8r1")>; @@ -2986,8 +2901,7 @@ def HWWriteResGroup65 : SchedWriteRes<[HWPort23,HWPort06,HWPort0156]> { let NumMicroOps = 4; let ResourceCycles = [1,1,2]; } -def: InstRW<[HWWriteResGroup65], (instregex "CMOVA(16|32|64)rm")>; -def: InstRW<[HWWriteResGroup65], (instregex "CMOVBE(16|32|64)rm")>; +def: InstRW<[HWWriteResGroup65], (instregex "CMOV(A|BE)(16|32|64)rm")>; def HWWriteResGroup66 : SchedWriteRes<[HWPort23,HWPort237,HWPort06,HWPort0156]> { let Latency = 9; diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index 4466d30f14c..a459bca3a4d 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -338,41 +338,11 @@ def: InstRW<[SBWriteResGroup2], (instregex "FFREE")>; def: InstRW<[SBWriteResGroup2], (instregex "FINCSTP")>; def: InstRW<[SBWriteResGroup2], (instregex "FNOP")>; def: InstRW<[SBWriteResGroup2], (instregex "INSERTPSrr")>; -def: InstRW<[SBWriteResGroup2], (instregex "JAE_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JAE_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JA_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JA_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JBE_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JBE_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JB_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JB_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JE_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JE_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JGE_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JGE_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JG_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JG_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JLE_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JLE_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JL_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JL_4")>; +def: InstRW<[SBWriteResGroup2], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_1")>; +def: InstRW<[SBWriteResGroup2], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_4")>; def: InstRW<[SBWriteResGroup2], (instregex "JMP64r")>; def: InstRW<[SBWriteResGroup2], (instregex "JMP_1")>; def: InstRW<[SBWriteResGroup2], (instregex "JMP_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNE_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNE_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNO_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNO_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNP_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNP_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNS_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JNS_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JO_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JO_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JP_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JP_4")>; -def: InstRW<[SBWriteResGroup2], (instregex "JS_1")>; -def: InstRW<[SBWriteResGroup2], (instregex "JS_4")>; def: InstRW<[SBWriteResGroup2], (instregex "LD_Frr")>; def: InstRW<[SBWriteResGroup2], (instregex "LOOP")>; def: InstRW<[SBWriteResGroup2], (instregex "LOOPE")>; @@ -492,20 +462,7 @@ def: InstRW<[SBWriteResGroup4], (instregex "LAHF")>; def: InstRW<[SBWriteResGroup4], (instregex "SAHF")>; def: InstRW<[SBWriteResGroup4], (instregex "SAR(16|32|64)ri")>; def: InstRW<[SBWriteResGroup4], (instregex "SAR8ri")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETAEr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETBr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETEr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETGEr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETGr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETLEr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETLr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETNEr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETNOr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETNPr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETNSr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETOr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETPr")>; -def: InstRW<[SBWriteResGroup4], (instregex "SETSr")>; +def: InstRW<[SBWriteResGroup4], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>; def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)ri")>; def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)r1")>; def: InstRW<[SBWriteResGroup4], (instregex "SHL8r1")>; @@ -789,8 +746,7 @@ def: InstRW<[SBWriteResGroup9], (instregex "ROL(16|32|64)ri")>; def: InstRW<[SBWriteResGroup9], (instregex "ROL8ri")>; def: InstRW<[SBWriteResGroup9], (instregex "ROR(16|32|64)ri")>; def: InstRW<[SBWriteResGroup9], (instregex "ROR8ri")>; -def: InstRW<[SBWriteResGroup9], (instregex "SETAr")>; -def: InstRW<[SBWriteResGroup9], (instregex "SETBEr")>; +def: InstRW<[SBWriteResGroup9], (instregex "SET(A|BE)r")>; def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDYrr")>; def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDrr")>; def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPSYrr")>; @@ -907,20 +863,7 @@ def: InstRW<[SBWriteResGroup19], (instregex "ADC(16|32|64)ri")>; def: InstRW<[SBWriteResGroup19], (instregex "ADC(16|32|64)rr")>; def: InstRW<[SBWriteResGroup19], (instregex "ADC8ri")>; def: InstRW<[SBWriteResGroup19], (instregex "ADC8rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVAE(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVB(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVE(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVG(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVGE(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVL(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVLE(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVNE(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVNO(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVNP(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVNS(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVO(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVP(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup19], (instregex "CMOVS(16|32|64)rr")>; +def: InstRW<[SBWriteResGroup19], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>; def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)ri")>; def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)rr")>; def: InstRW<[SBWriteResGroup19], (instregex "SBB8ri")>; @@ -1151,8 +1094,7 @@ def SBWriteResGroup26 : SchedWriteRes<[SBPort05,SBPort015]> { let NumMicroOps = 3; let ResourceCycles = [2,1]; } -def: InstRW<[SBWriteResGroup26], (instregex "CMOVA(16|32|64)rr")>; -def: InstRW<[SBWriteResGroup26], (instregex "CMOVBE(16|32|64)rr")>; +def: InstRW<[SBWriteResGroup26], (instregex "CMOV(A|BE)(16|32|64)rr")>; def SBWriteResGroup26_2 : SchedWriteRes<[SBPort0,SBPort1,SBPort5]> { let Latency = 3; @@ -1413,20 +1355,7 @@ def SBWriteResGroup38 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> { let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[SBWriteResGroup38], (instregex "SETAEm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETBm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETEm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETGEm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETGm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETLEm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETLm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETNEm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETNOm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETNPm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETNSm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETOm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETPm")>; -def: InstRW<[SBWriteResGroup38], (instregex "SETSm")>; +def: InstRW<[SBWriteResGroup38], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)m")>; def SBWriteResGroup39 : SchedWriteRes<[SBPort4,SBPort23,SBPort15]> { let Latency = 5; @@ -1469,8 +1398,7 @@ def SBWriteResGroup43 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> { let NumMicroOps = 4; let ResourceCycles = [1,1,2]; } -def: InstRW<[SBWriteResGroup43], (instregex "SETAm")>; -def: InstRW<[SBWriteResGroup43], (instregex "SETBEm")>; +def: InstRW<[SBWriteResGroup43], (instregex "SET(A|BE)m")>; def SBWriteResGroup44 : SchedWriteRes<[SBPort0,SBPort4,SBPort5,SBPort23]> { let Latency = 5; @@ -1930,20 +1858,7 @@ def SBWriteResGroup65 : SchedWriteRes<[SBPort23,SBPort05,SBPort015]> { } def: InstRW<[SBWriteResGroup65], (instregex "ADC(16|32|64)rm")>; def: InstRW<[SBWriteResGroup65], (instregex "ADC8rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVAE(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVB(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVE(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVG(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVGE(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVL(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVLE(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVNE(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVNO(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVNP(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVNS(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVO(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVP(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup65], (instregex "CMOVS(16|32|64)rm")>; +def: InstRW<[SBWriteResGroup65], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rm")>; def: InstRW<[SBWriteResGroup65], (instregex "SBB(16|32|64)rm")>; def: InstRW<[SBWriteResGroup65], (instregex "SBB8rm")>; @@ -2171,8 +2086,7 @@ def SBWriteResGroup82 : SchedWriteRes<[SBPort23,SBPort05,SBPort015]> { let NumMicroOps = 4; let ResourceCycles = [1,2,1]; } -def: InstRW<[SBWriteResGroup82], (instregex "CMOVA(16|32|64)rm")>; -def: InstRW<[SBWriteResGroup82], (instregex "CMOVBE(16|32|64)rm")>; +def: InstRW<[SBWriteResGroup82], (instregex "CMOV(A|BE)(16|32|64)rm")>; def SBWriteResGroup83 : SchedWriteRes<[SBPort23,SBPort015]> { let Latency = 8; diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td index 9a616903da9..1b86431969b 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -716,55 +716,12 @@ def: InstRW<[SKLWriteResGroup7], (instregex "BTS(16|32|64)ri8")>; def: InstRW<[SKLWriteResGroup7], (instregex "BTS(16|32|64)rr")>; def: InstRW<[SKLWriteResGroup7], (instregex "CDQ")>; def: InstRW<[SKLWriteResGroup7], (instregex "CLAC")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVAE(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVB(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVE(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVG(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVGE(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVL(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVLE(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVNE(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVNO(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVNP(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVNS(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVO(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVP(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "CMOVS(16|32|64)rr")>; +def: InstRW<[SKLWriteResGroup7], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>; def: InstRW<[SKLWriteResGroup7], (instregex "CQO")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JAE_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JAE_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JA_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JA_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JBE_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JBE_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JB_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JB_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JE_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JE_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JGE_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JGE_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JG_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JG_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JLE_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JLE_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JL_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JL_4")>; +def: InstRW<[SKLWriteResGroup7], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_1")>; +def: InstRW<[SKLWriteResGroup7], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_4")>; def: InstRW<[SKLWriteResGroup7], (instregex "JMP_1")>; def: InstRW<[SKLWriteResGroup7], (instregex "JMP_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNE_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNE_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNO_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNO_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNP_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNP_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNS_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JNS_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JO_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JO_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JP_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JP_4")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JS_1")>; -def: InstRW<[SKLWriteResGroup7], (instregex "JS_4")>; def: InstRW<[SKLWriteResGroup7], (instregex "RORX(32|64)ri")>; def: InstRW<[SKLWriteResGroup7], (instregex "SAR(16|32|64)r1")>; def: InstRW<[SKLWriteResGroup7], (instregex "SAR(16|32|64)ri")>; @@ -774,20 +731,7 @@ def: InstRW<[SKLWriteResGroup7], (instregex "SARX(32|64)rr")>; def: InstRW<[SKLWriteResGroup7], (instregex "SBB(16|32|64)ri")>; def: InstRW<[SKLWriteResGroup7], (instregex "SBB(16|32|64)rr(_REV)?")>; def: InstRW<[SKLWriteResGroup7], (instregex "SBB8rr(_REV)?")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETAEr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETBr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETEr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETGEr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETGr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETLEr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETLr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETNEr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETNOr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETNPr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETNSr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETOr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETPr")>; -def: InstRW<[SKLWriteResGroup7], (instregex "SETSr")>; +def: InstRW<[SKLWriteResGroup7], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>; def: InstRW<[SKLWriteResGroup7], (instregex "SHL(16|32|64)r1")>; def: InstRW<[SKLWriteResGroup7], (instregex "SHL(16|32|64)ri")>; def: InstRW<[SKLWriteResGroup7], (instregex "SHL8r1")>; @@ -1105,8 +1049,7 @@ def SKLWriteResGroup15 : SchedWriteRes<[SKLPort06]> { let NumMicroOps = 2; let ResourceCycles = [2]; } -def: InstRW<[SKLWriteResGroup15], (instregex "CMOVA(16|32|64)rr")>; -def: InstRW<[SKLWriteResGroup15], (instregex "CMOVBE(16|32|64)rr")>; +def: InstRW<[SKLWriteResGroup15], (instregex "CMOV(A|BE)(16|32|64)rr")>; def: InstRW<[SKLWriteResGroup15], (instregex "ROL(16|32|64)r1")>; def: InstRW<[SKLWriteResGroup15], (instregex "ROL(16|32|64)ri")>; def: InstRW<[SKLWriteResGroup15], (instregex "ROL8r1")>; @@ -1115,8 +1058,7 @@ def: InstRW<[SKLWriteResGroup15], (instregex "ROR(16|32|64)r1")>; def: InstRW<[SKLWriteResGroup15], (instregex "ROR(16|32|64)ri")>; def: InstRW<[SKLWriteResGroup15], (instregex "ROR8r1")>; def: InstRW<[SKLWriteResGroup15], (instregex "ROR8ri")>; -def: InstRW<[SKLWriteResGroup15], (instregex "SETAr")>; -def: InstRW<[SKLWriteResGroup15], (instregex "SETBEr")>; +def: InstRW<[SKLWriteResGroup15], (instregex "SET(A|BE)r")>; def SKLWriteResGroup16 : SchedWriteRes<[SKLPort015]> { let Latency = 2; @@ -1244,20 +1186,7 @@ def SKLWriteResGroup26 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort06]> { let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[SKLWriteResGroup26], (instregex "SETAEm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETBm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETEm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETGEm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETGm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETLEm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETLm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETNEm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETNOm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETNPm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETNSm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETOm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETPm")>; -def: InstRW<[SKLWriteResGroup26], (instregex "SETSm")>; +def: InstRW<[SKLWriteResGroup26], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)m")>; def SKLWriteResGroup27 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort15]> { let Latency = 2; @@ -1512,8 +1441,7 @@ def SKLWriteResGroup44 : SchedWriteRes<[SKLPort4,SKLPort237,SKLPort06]> { let NumMicroOps = 4; let ResourceCycles = [1,1,2]; } -def: InstRW<[SKLWriteResGroup44], (instregex "SETAm")>; -def: InstRW<[SKLWriteResGroup44], (instregex "SETBEm")>; +def: InstRW<[SKLWriteResGroup44], (instregex "SET(A|BE)m")>; def SKLWriteResGroup45 : SchedWriteRes<[SKLPort4,SKLPort6,SKLPort237,SKLPort0156]> { let Latency = 3; @@ -2066,20 +1994,7 @@ def: InstRW<[SKLWriteResGroup74], (instregex "ADC8rm")>; def: InstRW<[SKLWriteResGroup74], (instregex "ADCX(32|64)rm")>; def: InstRW<[SKLWriteResGroup74], (instregex "ADOX(32|64)rm")>; def: InstRW<[SKLWriteResGroup74], (instregex "BT(16|32|64)mi8")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVAE(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVB(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVE(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVG(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVGE(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVL(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVLE(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVNE(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVNO(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVNP(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVNS(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVO(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVP(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup74], (instregex "CMOVS(16|32|64)rm")>; +def: InstRW<[SKLWriteResGroup74], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rm")>; def: InstRW<[SKLWriteResGroup74], (instregex "RORX32mi")>; def: InstRW<[SKLWriteResGroup74], (instregex "RORX64mi")>; def: InstRW<[SKLWriteResGroup74], (instregex "SARX32rm")>; @@ -2530,8 +2445,7 @@ def SKLWriteResGroup93 : SchedWriteRes<[SKLPort23,SKLPort06]> { let NumMicroOps = 3; let ResourceCycles = [1,2]; } -def: InstRW<[SKLWriteResGroup93], (instregex "CMOVA(16|32|64)rm")>; -def: InstRW<[SKLWriteResGroup93], (instregex "CMOVBE(16|32|64)rm")>; +def: InstRW<[SKLWriteResGroup93], (instregex "CMOV(A|BE)(16|32|64)rm")>; def SKLWriteResGroup94 : SchedWriteRes<[SKLPort23,SKLPort0156]> { let Latency = 7; diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td index 926eb2e251b..de2ee18d417 100755 --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -1020,55 +1020,12 @@ def: InstRW<[SKXWriteResGroup7], (instregex "BTS(16|32|64)ri8")>; def: InstRW<[SKXWriteResGroup7], (instregex "BTS(16|32|64)rr")>; def: InstRW<[SKXWriteResGroup7], (instregex "CDQ")>; def: InstRW<[SKXWriteResGroup7], (instregex "CLAC")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVAE(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVB(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVE(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVG(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVGE(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVL(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVLE(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVNE(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVNO(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVNP(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVNS(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVO(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVP(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "CMOVS(16|32|64)rr")>; +def: InstRW<[SKXWriteResGroup7], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>; def: InstRW<[SKXWriteResGroup7], (instregex "CQO")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JAE_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JAE_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JA_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JA_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JBE_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JBE_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JB_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JB_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JE_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JE_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JGE_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JGE_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JG_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JG_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JLE_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JLE_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JL_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JL_4")>; +def: InstRW<[SKXWriteResGroup7], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_1")>; +def: InstRW<[SKXWriteResGroup7], (instregex "J(A|AE|B|BE|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)_4")>; def: InstRW<[SKXWriteResGroup7], (instregex "JMP_1")>; def: InstRW<[SKXWriteResGroup7], (instregex "JMP_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNE_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNE_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNO_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNO_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNP_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNP_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNS_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JNS_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JO_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JO_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JP_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JP_4")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JS_1")>; -def: InstRW<[SKXWriteResGroup7], (instregex "JS_4")>; def: InstRW<[SKXWriteResGroup7], (instregex "RORX(32|64)ri")>; def: InstRW<[SKXWriteResGroup7], (instregex "SAR(16|32|64)r1")>; def: InstRW<[SKXWriteResGroup7], (instregex "SAR(16|32|64)ri")>; @@ -1078,20 +1035,7 @@ def: InstRW<[SKXWriteResGroup7], (instregex "SARX(32|64)rr")>; def: InstRW<[SKXWriteResGroup7], (instregex "SBB(16|32|64)ri")>; def: InstRW<[SKXWriteResGroup7], (instregex "SBB(16|32|64)rr(_REV)?")>; def: InstRW<[SKXWriteResGroup7], (instregex "SBB8rr(_REV)?")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETAEr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETBr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETEr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETGEr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETGr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETLEr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETLr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETNEr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETNOr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETNPr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETNSr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETOr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETPr")>; -def: InstRW<[SKXWriteResGroup7], (instregex "SETSr")>; +def: InstRW<[SKXWriteResGroup7], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>; def: InstRW<[SKXWriteResGroup7], (instregex "SHL(16|32|64)r1")>; def: InstRW<[SKXWriteResGroup7], (instregex "SHL(16|32|64)ri")>; def: InstRW<[SKXWriteResGroup7], (instregex "SHL8r1")>; @@ -1607,8 +1551,7 @@ def SKXWriteResGroup15 : SchedWriteRes<[SKXPort06]> { let NumMicroOps = 2; let ResourceCycles = [2]; } -def: InstRW<[SKXWriteResGroup15], (instregex "CMOVA(16|32|64)rr")>; -def: InstRW<[SKXWriteResGroup15], (instregex "CMOVBE(16|32|64)rr")>; +def: InstRW<[SKXWriteResGroup15], (instregex "CMOV(A|BE)(16|32|64)rr")>; def: InstRW<[SKXWriteResGroup15], (instregex "ROL(16|32|64)r1")>; def: InstRW<[SKXWriteResGroup15], (instregex "ROL(16|32|64)ri")>; def: InstRW<[SKXWriteResGroup15], (instregex "ROL8r1")>; @@ -1617,8 +1560,7 @@ def: InstRW<[SKXWriteResGroup15], (instregex "ROR(16|32|64)r1")>; def: InstRW<[SKXWriteResGroup15], (instregex "ROR(16|32|64)ri")>; def: InstRW<[SKXWriteResGroup15], (instregex "ROR8r1")>; def: InstRW<[SKXWriteResGroup15], (instregex "ROR8ri")>; -def: InstRW<[SKXWriteResGroup15], (instregex "SETAr")>; -def: InstRW<[SKXWriteResGroup15], (instregex "SETBEr")>; +def: InstRW<[SKXWriteResGroup15], (instregex "SET(A|BE)r")>; def SKXWriteResGroup16 : SchedWriteRes<[SKXPort015]> { let Latency = 2; @@ -1759,20 +1701,7 @@ def SKXWriteResGroup26 : SchedWriteRes<[SKXPort4,SKXPort237,SKXPort06]> { let NumMicroOps = 3; let ResourceCycles = [1,1,1]; } -def: InstRW<[SKXWriteResGroup26], (instregex "SETAEm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETBm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETEm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETGEm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETGm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETLEm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETLm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETNEm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETNOm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETNPm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETNSm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETOm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETPm")>; -def: InstRW<[SKXWriteResGroup26], (instregex "SETSm")>; +def: InstRW<[SKXWriteResGroup26], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)m")>; def SKXWriteResGroup27 : SchedWriteRes<[SKXPort4,SKXPort237,SKXPort15]> { let Latency = 2; @@ -2318,8 +2247,7 @@ def SKXWriteResGroup46 : SchedWriteRes<[SKXPort4,SKXPort237,SKXPort06]> { let NumMicroOps = 4; let ResourceCycles = [1,1,2]; } -def: InstRW<[SKXWriteResGroup46], (instregex "SETAm")>; -def: InstRW<[SKXWriteResGroup46], (instregex "SETBEm")>; +def: InstRW<[SKXWriteResGroup46], (instregex "SET(A|BE)m")>; def SKXWriteResGroup47 : SchedWriteRes<[SKXPort4,SKXPort6,SKXPort237,SKXPort0156]> { let Latency = 3; @@ -3250,20 +3178,7 @@ def: InstRW<[SKXWriteResGroup78], (instregex "ADC8rm")>; def: InstRW<[SKXWriteResGroup78], (instregex "ADCX(32|64)rm")>; def: InstRW<[SKXWriteResGroup78], (instregex "ADOX(32|64)rm")>; def: InstRW<[SKXWriteResGroup78], (instregex "BT(16|32|64)mi8")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVAE(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVB(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVE(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVG(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVGE(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVL(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVLE(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVNE(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVNO(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVNP(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVNS(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVO(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVP(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup78], (instregex "CMOVS(16|32|64)rm")>; +def: InstRW<[SKXWriteResGroup78], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rm")>; def: InstRW<[SKXWriteResGroup78], (instregex "RORX(32|64)mi")>; def: InstRW<[SKXWriteResGroup78], (instregex "SARX(32|64)rm")>; def: InstRW<[SKXWriteResGroup78], (instregex "SBB(16|32|64)rm")>; @@ -3908,8 +3823,7 @@ def SKXWriteResGroup98 : SchedWriteRes<[SKXPort23,SKXPort06]> { let NumMicroOps = 3; let ResourceCycles = [1,2]; } -def: InstRW<[SKXWriteResGroup98], (instregex "CMOVA(16|32|64)rm")>; -def: InstRW<[SKXWriteResGroup98], (instregex "CMOVBE(16|32|64)rm")>; +def: InstRW<[SKXWriteResGroup98], (instregex "CMOV(A|BE)(16|32|64)rm")>; def SKXWriteResGroup99 : SchedWriteRes<[SKXPort23,SKXPort0156]> { let Latency = 7; |
