diff options
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/avx-512.txt | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp index e08c1a6e194..7badda457f4 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp @@ -1773,7 +1773,7 @@ static int readOperands(struct InternalInstruction* insn) { // If sibIndex was set to SIB_INDEX_NONE, index offset is 4. if (insn->sibIndex == SIB_INDEX_NONE) - insn->sibIndex = (SIBIndex)4; + insn->sibIndex = (SIBIndex)(insn->sibIndexBase + 4); // If EVEX.v2 is set this is one of the 16-31 registers. if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT && diff --git a/llvm/test/MC/Disassembler/X86/avx-512.txt b/llvm/test/MC/Disassembler/X86/avx-512.txt index f617451bc96..563f6c6a275 100644 --- a/llvm/test/MC/Disassembler/X86/avx-512.txt +++ b/llvm/test/MC/Disassembler/X86/avx-512.txt @@ -47,6 +47,9 @@ # CHECK: vgatherdpd (%rsi,%ymm0,4), %zmm1 {%k2} 0x62 0xf2 0xfd 0x4a 0x92 0x0c 0x86 +# CHECK: vgatherqps (%r13,%zmm4), %ymm5 {%k2} +0x62 0xd2 0x7d 0x4a 0x93 0x6c 0x25 0x00 + # CHECK: vpslld $16, %zmm21, %zmm22 0x62 0xb1 0x4d 0x40 0x72 0xf5 0x10 |
