diff options
| -rw-r--r-- | llvm/include/llvm/CodeGen/MachineOperand.h | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MIRPrinter.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineInstr.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineOperand.cpp | 2 | ||||
| -rw-r--r-- | llvm/unittests/CodeGen/MachineOperandTest.cpp | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineOperand.h b/llvm/include/llvm/CodeGen/MachineOperand.h index 4be7942c2c6..ebd130556c4 100644 --- a/llvm/include/llvm/CodeGen/MachineOperand.h +++ b/llvm/include/llvm/CodeGen/MachineOperand.h @@ -238,7 +238,7 @@ public: /// MO_Immediate operands can also be subreg idices. If it's the case, the /// subreg index name will be printed. MachineInstr::isOperandSubregIdx can be /// called to check this. - static void printSubregIdx(raw_ostream &OS, uint64_t Index, + static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI); /// Print operand target flags. diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index 90515a6a9a2..5e7a2585b4e 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -744,7 +744,7 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, case MachineOperand::MO_Immediate: if (MI.isOperandSubregIdx(OpIdx)) { MachineOperand::printTargetFlags(OS, Op); - MachineOperand::printSubregIdx(OS, Op.getImm(), TRI); + MachineOperand::printSubRegIdx(OS, Op.getImm(), TRI); break; } LLVM_FALLTHROUGH; diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp index eba100ee15e..47974a253ba 100644 --- a/llvm/lib/CodeGen/MachineInstr.cpp +++ b/llvm/lib/CodeGen/MachineInstr.cpp @@ -1397,7 +1397,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST, LLT TypeToPrint = MRI ? getTypeToPrint(i, PrintedTypes, *MRI) : LLT{}; unsigned TiedOperandIdx = getTiedOperandIdx(i); if (MO.isImm() && isOperandSubregIdx(i)) - MachineOperand::printSubregIdx(OS, MO.getImm(), TRI); + MachineOperand::printSubRegIdx(OS, MO.getImm(), TRI); else MO.print(OS, MST, TypeToPrint, /*PrintDef=*/true, ShouldPrintRegisterTies, TiedOperandIdx, TRI, IntrinsicInfo); diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index b4bfa3fecf0..9d0c93eb27d 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -440,7 +440,7 @@ static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB, OS << "<unknown>"; } -void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index, +void MachineOperand::printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI) { OS << "%subreg."; if (TRI) diff --git a/llvm/unittests/CodeGen/MachineOperandTest.cpp b/llvm/unittests/CodeGen/MachineOperandTest.cpp index 5bb0b622e09..6861dbfe383 100644 --- a/llvm/unittests/CodeGen/MachineOperandTest.cpp +++ b/llvm/unittests/CodeGen/MachineOperandTest.cpp @@ -119,7 +119,7 @@ TEST(MachineOperandTest, PrintSubRegIndex) { std::string str; raw_string_ostream OS(str); ModuleSlotTracker DummyMST(nullptr); - MachineOperand::printSubregIdx(OS, MO.getImm(), nullptr); + MachineOperand::printSubRegIdx(OS, MO.getImm(), nullptr); ASSERT_TRUE(OS.str() == "%subreg.3"); } |
