diff options
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/div.ll | 10 |
2 files changed, 13 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp index b79f55e1435..216177ff2b4 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -1097,7 +1097,9 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) { if (MaskedValueIsZero(Op0, Mask, 0, &I)) { if (MaskedValueIsZero(Op1, Mask, 0, &I)) { // X sdiv Y -> X udiv Y, iff X and Y don't have sign bit set - return BinaryOperator::CreateUDiv(Op0, Op1, I.getName()); + auto *BO = BinaryOperator::CreateUDiv(Op0, Op1, I.getName()); + BO->setIsExact(I.isExact()); + return BO; } if (match(Op1, m_Shl(m_Power2(), m_Value()))) { diff --git a/llvm/test/Transforms/InstCombine/div.ll b/llvm/test/Transforms/InstCombine/div.ll index f4166ec5cbc..cfe346e1f2b 100644 --- a/llvm/test/Transforms/InstCombine/div.ll +++ b/llvm/test/Transforms/InstCombine/div.ll @@ -304,3 +304,13 @@ define <2 x i64> @test34(<2 x i64> %x) nounwind { ; CHECK-NEXT: sdiv exact <2 x i64> %x, <i64 -3, i64 -4> ; CHECK-NEXT: ret <2 x i64> } + +define i32 @test35(i32 %A) { + %and = and i32 %A, 2147483647 + %mul = sdiv exact i32 %and, 2147483647 + ret i32 %mul +; CHECK-LABEL: @test35( +; CHECK-NEXT: %[[and:.*]] = and i32 %A, 2147483647 +; CHECK-NEXT: %[[udiv:.*]] = udiv exact i32 %[[and]], 2147483647 +; CHECK-NEXT: ret i32 %[[udiv]] +} |
