diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 14 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/fp-une-cmp.ll | 28 |
2 files changed, 37 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 11c532c7d71..acf042f242f 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -3927,17 +3927,21 @@ bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr &MI) const { return !isPredicated(MI); } -// Given a MBB and its TBB, find the FBB which was a fallthrough MBB (it may not -// be a fallthorough MBB now due to layout changes). Return nullptr if the -// fallthough MBB cannot be identified. +// Given a MBB and its TBB, find the FBB which was a fallthrough MBB (it may +// not be a fallthrough MBB now due to layout changes). Return nullptr if the +// fallthrough MBB cannot be identified. static MachineBasicBlock *getFallThroughMBB(MachineBasicBlock *MBB, MachineBasicBlock *TBB) { + // Look for non-EHPad successors other than TBB. If we find exactly one, it + // is the fallthrough MBB. If we find zero, then TBB is both the target MBB + // and fallthrough MBB. If we find more than one, we cannot identify the + // fallthrough MBB and should return nullptr. MachineBasicBlock *FallthroughBB = nullptr; for (auto SI = MBB->succ_begin(), SE = MBB->succ_end(); SI != SE; ++SI) { - if ((*SI)->isEHPad() || *SI == TBB) + if ((*SI)->isEHPad() || (*SI == TBB && FallthroughBB)) continue; // Return a nullptr if we found more than one fallthrough successor. - if (FallthroughBB) + if (FallthroughBB && FallthroughBB != TBB) return nullptr; FallthroughBB = *SI; } diff --git a/llvm/test/CodeGen/X86/fp-une-cmp.ll b/llvm/test/CodeGen/X86/fp-une-cmp.ll index 179fffca379..653040053c2 100644 --- a/llvm/test/CodeGen/X86/fp-une-cmp.ll +++ b/llvm/test/CodeGen/X86/fp-une-cmp.ll @@ -102,6 +102,34 @@ if.end: ret void } +; Test that an FP oeq/une conditional branch can be inverted successfully even +; when the true and false targets are the same (PR27750). +; +; CHECK-LABEL: pr27750 +; CHECK: ucomiss +; CHECK-NEXT: jne [[TARGET:.*]] +; CHECK-NEXT: jp [[TARGET]] +define void @pr27750(i32* %b, float %x, i1 %y) { +entry: + br label %for.cond + +for.cond: + br label %for.cond1 + +for.cond1: + br i1 %y, label %for.body3.lr.ph, label %for.end + +for.body3.lr.ph: + store i32 0, i32* %b, align 4 + br label %for.end + +for.end: +; After block %for.cond gets eliminated, the two target blocks of this +; conditional block are the same. + %tobool = fcmp une float %x, 0.000000e+00 + br i1 %tobool, label %for.cond, label %for.cond1 +} + declare void @a() !1 = !{!"branch_weights", i32 1, i32 1000} |
