diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86FixupBWInsts.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/anyext.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/avx512bw-intrinsics.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll | 4 |
4 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp index 68ac0979270..1f8a4406add 100644 --- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp +++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp @@ -68,7 +68,7 @@ using namespace llvm; static cl::opt<bool> FixupBWInsts("fixup-byte-word-insts", cl::desc("Change byte and word instructions to larger sizes"), - cl::init(false), cl::Hidden); + cl::init(true), cl::Hidden); namespace { class FixupBWInstPass : public MachineFunctionPass { diff --git a/llvm/test/CodeGen/X86/anyext.ll b/llvm/test/CodeGen/X86/anyext.ll index 0e0230f6be6..0117932035d 100644 --- a/llvm/test/CodeGen/X86/anyext.ll +++ b/llvm/test/CodeGen/X86/anyext.ll @@ -30,7 +30,7 @@ define i32 @foo(i32 %p, i8 zeroext %x) nounwind { define i32 @bar(i32 %p, i16 zeroext %x) nounwind { ; X32-LABEL: bar: ; X32: # BB#0: -; X32-NEXT: movw {{[0-9]+}}(%esp), %ax +; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X32-NEXT: xorl %edx, %edx ; X32-NEXT: divw {{[0-9]+}}(%esp) ; X32-NEXT: andl $1, %eax diff --git a/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll b/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll index 6a9b9dcb82a..21e18f5af53 100644 --- a/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll +++ b/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll @@ -3565,7 +3565,7 @@ define <32 x i16>@test_int_x86_avx512_mask_pbroadcast_w_gpr_512(i16 %x0, <32 x i ; ; AVX512F-32-LABEL: test_int_x86_avx512_mask_pbroadcast_w_gpr_512: ; AVX512F-32: # BB#0: -; AVX512F-32-NEXT: movw {{[0-9]+}}(%esp), %ax +; AVX512F-32-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1 ; AVX512F-32-NEXT: vpbroadcastw %ax, %zmm0 {%k1} ; AVX512F-32-NEXT: vpbroadcastw %ax, %zmm1 {%k1} {z} diff --git a/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll b/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll index 8e148aa76d3..735e64a076d 100644 --- a/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll +++ b/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll @@ -6,10 +6,10 @@ ; they must not be placed on the same chain after merging. ; X86-LABEL: {{^}}merge_store_partial_overlap_load: -; X86-DAG: movw ([[BASEREG:%[a-z]+]]), [[LO2:%[a-z]+]] +; X86-DAG: movzwl ([[BASEREG:%[a-z]+]]), %e[[LO2:[a-z]+]] ; X86-DAG: movb 2([[BASEREG]]), [[HI1:%[a-z]+]] -; X86-NEXT: movw [[LO2]], 1([[BASEREG]]) +; X86-NEXT: movw %[[LO2]], 1([[BASEREG]]) ; X86-NEXT: movb [[HI1]], 3([[BASEREG]]) ; X86-NEXT: retq |
