diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_int_to_fp.ll | 6 |
2 files changed, 6 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 3c52d1db28f..fa9671a4446 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -2199,6 +2199,8 @@ let Predicates = [HasAVX] in { (VCVTDQ2PDrr VR128:$src)>; def : Pat<(v2f64 (X86cvtdq2pd (bc_v4i32 (loadv2i64 addr:$src)))), (VCVTDQ2PDrm addr:$src)>; + def : Pat<(v2f64 (X86cvtdq2pd (bc_v4i32 (v2i64 (scalar_to_vector (loadi64 addr:$src)))))), + (VCVTDQ2PDrm addr:$src)>; def : Pat<(v4f64 (sint_to_fp (v4i32 VR128:$src))), (VCVTDQ2PDYrr VR128:$src)>; @@ -2212,6 +2214,8 @@ let Predicates = [HasSSE2] in { (CVTDQ2PDrr VR128:$src)>; def : Pat<(v2f64 (X86cvtdq2pd (bc_v4i32 (loadv2i64 addr:$src)))), (CVTDQ2PDrm addr:$src)>; + def : Pat<(v2f64 (X86cvtdq2pd (bc_v4i32 (v2i64 (scalar_to_vector (loadi64 addr:$src)))))), + (CVTDQ2PDrm addr:$src)>; } // Predicates = [HasSSE2] // Convert packed double to packed single diff --git a/llvm/test/CodeGen/X86/vec_int_to_fp.ll b/llvm/test/CodeGen/X86/vec_int_to_fp.ll index 562884d8010..1540b272857 100644 --- a/llvm/test/CodeGen/X86/vec_int_to_fp.ll +++ b/llvm/test/CodeGen/X86/vec_int_to_fp.ll @@ -1836,14 +1836,12 @@ define <2 x double> @sitofp_load_2i64_to_2f64(<2 x i64> *%a) { define <2 x double> @sitofp_load_2i32_to_2f64(<2 x i32> *%a) { ; SSE-LABEL: sitofp_load_2i32_to_2f64: ; SSE: # BB#0: -; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero -; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 +; SSE-NEXT: cvtdq2pd (%rdi), %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: sitofp_load_2i32_to_2f64: ; AVX: # BB#0: -; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero -; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 +; AVX-NEXT: vcvtdq2pd (%rdi), %xmm0 ; AVX-NEXT: retq %ld = load <2 x i32>, <2 x i32> *%a %cvt = sitofp <2 x i32> %ld to <2 x double> |
