diff options
| -rw-r--r-- | llvm/lib/CodeGen/TargetLoweringBase.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/legalize-bug-bogus-cpu.ll | 8 |
2 files changed, 13 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index a5889db9104..d0acf0e6913 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -1200,8 +1200,12 @@ void TargetLoweringBase::computeRegisterProperties() { TransformToType[i] = MVT::Other; if (PreferredAction == TypeScalarizeVector) ValueTypeActions.setTypeAction(VT, TypeScalarizeVector); - else + else if (PreferredAction == TypeSplitVector) ValueTypeActions.setTypeAction(VT, TypeSplitVector); + else + // Set type action according to the number of elements. + ValueTypeActions.setTypeAction(VT, NElts == 1 ? TypeScalarizeVector + : TypeSplitVector); } else { TransformToType[i] = NVT; ValueTypeActions.setTypeAction(VT, TypeWidenVector); diff --git a/llvm/test/CodeGen/AArch64/legalize-bug-bogus-cpu.ll b/llvm/test/CodeGen/AArch64/legalize-bug-bogus-cpu.ll new file mode 100644 index 00000000000..b785a8f045f --- /dev/null +++ b/llvm/test/CodeGen/AArch64/legalize-bug-bogus-cpu.ll @@ -0,0 +1,8 @@ +; RUN: llc -march=aarch64 -mcpu=bogus -o - %s + +; Fix the bug in PR20557. Set mcpu to a bogus name, llc will crash in type +; legalization. +define <4 x float> @fneg4(<4 x float> %x) { + %sub = fsub <4 x float> zeroinitializer, %x + ret <4 x float> %sub +} |
