diff options
| -rw-r--r-- | llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/MC/RISCV/tail-call.s | 10 |
2 files changed, 11 insertions, 7 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp index 63b005cc403..8a796a014b3 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp @@ -115,8 +115,12 @@ void RISCVMCCodeEmitter::expandFunctionCall(const MCInst &MI, raw_ostream &OS, Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); support::endian::write(OS, Binary, support::little); - // Emit JALR Ra, Ra, 0 - TmpInst = MCInstBuilder(RISCV::JALR).addReg(Ra).addReg(Ra).addImm(0); + if (MI.getOpcode() == RISCV::PseudoTAIL) + // Emit JALR X0, X6, 0 + TmpInst = MCInstBuilder(RISCV::JALR).addReg(RISCV::X0).addReg(Ra).addImm(0); + else + // Emit JALR X1, X1, 0 + TmpInst = MCInstBuilder(RISCV::JALR).addReg(Ra).addReg(Ra).addImm(0); Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); support::endian::write(OS, Binary, support::little); } diff --git a/llvm/test/MC/RISCV/tail-call.s b/llvm/test/MC/RISCV/tail-call.s index dcbe57933a9..9662e61d866 100644 --- a/llvm/test/MC/RISCV/tail-call.s +++ b/llvm/test/MC/RISCV/tail-call.s @@ -17,12 +17,12 @@ tail foo # RELOC: R_RISCV_CALL foo 0x0 # INSTR: auipc t1, 0 -# INSTR: jalr t1 +# INSTR: jr t1 # FIXUP: fixup A - offset: 0, value: foo, kind: tail bar # RELOC: R_RISCV_CALL bar 0x0 # INSTR: auipc t1, 0 -# INSTR: jalr t1 +# INSTR: jr t1 # FIXUP: fixup A - offset: 0, value: bar, kind: # Ensure that tail calls to functions whose names coincide with register names @@ -31,17 +31,17 @@ tail bar tail zero # RELOC: R_RISCV_CALL zero 0x0 # INSTR: auipc t1, 0 -# INSTR: jalr t1 +# INSTR: jr t1 # FIXUP: fixup A - offset: 0, value: zero, kind: tail f1 # RELOC: R_RISCV_CALL f1 0x0 # INSTR: auipc t1, 0 -# INSTR: jalr t1 +# INSTR: jr t1 # FIXUP: fixup A - offset: 0, value: f1, kind: tail ra # RELOC: R_RISCV_CALL ra 0x0 # INSTR: auipc t1, 0 -# INSTR: jalr t1 +# INSTR: jr t1 # FIXUP: fixup A - offset: 0, value: ra, kind: |
