diff options
-rw-r--r-- | clang/lib/Sema/SemaLookup.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MIRVRegNamerUtils.h | 10 | ||||
-rw-r--r-- | llvm/lib/CodeGen/ModuloSchedule.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 8 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86FrameLowering.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/Transforms/IPO/Attributor.cpp | 4 |
7 files changed, 23 insertions, 9 deletions
diff --git a/clang/lib/Sema/SemaLookup.cpp b/clang/lib/Sema/SemaLookup.cpp index e960057725d..dfc1cce89d5 100644 --- a/clang/lib/Sema/SemaLookup.cpp +++ b/clang/lib/Sema/SemaLookup.cpp @@ -3701,6 +3701,7 @@ NamedDecl *VisibleDeclsRecord::checkHidden(NamedDecl *ND) { return nullptr; } +namespace { class LookupVisibleHelper { public: LookupVisibleHelper(VisibleDeclConsumer &Consumer, bool IncludeDependentBases, @@ -4025,6 +4026,7 @@ private: bool IncludeDependentBases; bool LoadExternal; }; +} // namespace void Sema::LookupVisibleDecls(Scope *S, LookupNameKind Kind, VisibleDeclConsumer &Consumer, diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.h b/llvm/lib/CodeGen/MIRVRegNamerUtils.h index 06d16f80cd0..c5b52a96853 100644 --- a/llvm/lib/CodeGen/MIRVRegNamerUtils.h +++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.h @@ -1,3 +1,4 @@ + //===------------ MIRVRegNamerUtils.h - MIR VReg Renaming Utilities -------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. @@ -13,6 +14,9 @@ // //===----------------------------------------------------------------------===// +#ifndef LLVM_LIB_CODEGEN_MIRVREGNAMERUTILS_H +#define LLVM_LIB_CODEGEN_MIRVREGNAMERUTILS_H + #include "llvm/ADT/PostOrderIterator.h" #include "llvm/ADT/STLExtras.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -23,7 +27,7 @@ #include <queue> -using namespace llvm; +namespace llvm { /// NamedVRegCursor - The cursor is an object that keeps track of what the next /// vreg name should be. It does book keeping to determine when to skip the @@ -81,3 +85,7 @@ public: // @return changed bool renameVRegs(MachineBasicBlock *MBB); }; + +} // namespace llvm + +#endif diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp index 55fa2aff293..8bea4037f54 100644 --- a/llvm/lib/CodeGen/ModuloSchedule.cpp +++ b/llvm/lib/CodeGen/ModuloSchedule.cpp @@ -1667,6 +1667,7 @@ void PeelingModuloScheduleExpander::validateAgainstModuloScheduleExpander() { // "Stage=%d Cycle=%d". //===----------------------------------------------------------------------===// +namespace { class ModuloScheduleTest : public MachineFunctionPass { public: static char ID; @@ -1684,6 +1685,7 @@ public: MachineFunctionPass::getAnalysisUsage(AU); } }; +} // namespace char ModuloScheduleTest::ID = 0; diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 77311c5b918..5048371282b 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -5843,7 +5843,7 @@ enum PredicateConstraint { Invalid }; -PredicateConstraint parsePredicateConstraint(StringRef Constraint) { +static PredicateConstraint parsePredicateConstraint(StringRef Constraint) { PredicateConstraint P = PredicateConstraint::Invalid; if (Constraint == "Upa") P = PredicateConstraint::Upa; diff --git a/llvm/lib/Target/ARM/MVEVPTBlockPass.cpp b/llvm/lib/Target/ARM/MVEVPTBlockPass.cpp index 9b1bd21ef28..9d986b6167e 100644 --- a/llvm/lib/Target/ARM/MVEVPTBlockPass.cpp +++ b/llvm/lib/Target/ARM/MVEVPTBlockPass.cpp @@ -80,7 +80,7 @@ enum VPTMaskValue { TETE = 15 // 0b1111 }; -unsigned VCMPOpcodeToVPT(unsigned Opcode) { +static unsigned VCMPOpcodeToVPT(unsigned Opcode) { switch (Opcode) { case ARM::MVE_VCMPf32: return ARM::MVE_VPTv4f32; @@ -133,9 +133,9 @@ unsigned VCMPOpcodeToVPT(unsigned Opcode) { } } -MachineInstr *findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI, - const TargetRegisterInfo *TRI, - unsigned &NewOpcode) { +static MachineInstr *findVCMPToFoldIntoVPST(MachineBasicBlock::iterator MI, + const TargetRegisterInfo *TRI, + unsigned &NewOpcode) { // Search backwards to the instruction that defines VPR. This may or not // be a VCMP, we check that after this loop. If we find another instruction // that reads cpsr, we return nullptr. diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp index e1ed5aa5abc..af3a33ffd4e 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -2552,8 +2552,8 @@ static unsigned getHiPELiteral( // Return true if there are no non-ehpad successors to MBB and there are no // non-meta instructions between MBBI and MBB.end(). -bool blockEndIsUnreachable(const MachineBasicBlock &MBB, - MachineBasicBlock::const_iterator MBBI) { +static bool blockEndIsUnreachable(const MachineBasicBlock &MBB, + MachineBasicBlock::const_iterator MBBI) { return std::all_of( MBB.succ_begin(), MBB.succ_end(), [](const MachineBasicBlock *Succ) { return Succ->isEHPad(); }) && diff --git a/llvm/lib/Transforms/IPO/Attributor.cpp b/llvm/lib/Transforms/IPO/Attributor.cpp index 654f2084be4..0f5d2aa8e17 100644 --- a/llvm/lib/Transforms/IPO/Attributor.cpp +++ b/llvm/lib/Transforms/IPO/Attributor.cpp @@ -161,7 +161,7 @@ ChangeStatus llvm::operator&(ChangeStatus l, ChangeStatus r) { /// limit how much effort is invested, we will never visit more values than /// specified by \p MaxValues. template <typename AAType, typename StateTy> -bool genericValueTraversal( +static bool genericValueTraversal( Attributor &A, IRPosition IRP, const AAType &QueryingAA, StateTy &State, const function_ref<bool(Value &, StateTy &, bool)> &VisitValueCB, int MaxValues = 8) { @@ -486,6 +486,7 @@ void IRPosition::verify() { } } +namespace { /// Helper functions to clamp a state \p S of type \p StateType with the /// information in \p R and indicate/return if \p S did change (as-in update is /// required to be run again). @@ -3406,6 +3407,7 @@ struct AAHeapToStackFunction final : public AAHeapToStackImpl { BUILD_STAT_NAME(MallocCalls, Function) += MallocCalls.size(); } }; +} // namespace /// ---------------------------------------------------------------------------- /// Attributor |