diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/AMDGPU/decode-err.txt | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp index ec2e2c4e8b7..4ae98158102 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -73,7 +73,7 @@ addOperand(MCInst &Inst, const MCOperand& Opnd) { Inst.addOperand(Opnd); return Opnd.isValid() ? MCDisassembler::Success : - MCDisassembler::SoftFail; + MCDisassembler::Fail; } static int insertNamedMCOperand(MCInst &MI, const MCOperand &Op, diff --git a/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt new file mode 100644 index 00000000000..b90ce05a56e --- /dev/null +++ b/llvm/test/MC/Disassembler/AMDGPU/decode-err.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s 2>&1 | FileCheck -check-prefix=GCN %s + +# GCN: warning: invalid instruction encoding +0xdf,0x00,0x00,0x02 |
