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-rw-r--r--lldb/examples/python/x86_64_linux_target_definition.py2
-rw-r--r--lldb/examples/python/x86_64_qemu_target_definition.py2
2 files changed, 2 insertions, 2 deletions
diff --git a/lldb/examples/python/x86_64_linux_target_definition.py b/lldb/examples/python/x86_64_linux_target_definition.py
index 7f03da26420..13bde540f7e 100644
--- a/lldb/examples/python/x86_64_linux_target_definition.py
+++ b/lldb/examples/python/x86_64_linux_target_definition.py
@@ -740,7 +740,7 @@ def get_target_definition():
# info
if 'slice' not in reg_info and 'composite' not in reg_info:
reg_info['offset'] = offset
- offset += reg_info['bitsize'] / 8
+ offset += reg_info['bitsize'] // 8
# Set the GCC/DWARF register number for this register if it has one
reg_num = get_reg_num(name_to_gcc_dwarf_regnum, reg_name)
diff --git a/lldb/examples/python/x86_64_qemu_target_definition.py b/lldb/examples/python/x86_64_qemu_target_definition.py
index 015340fa35f..aa081c16117 100644
--- a/lldb/examples/python/x86_64_qemu_target_definition.py
+++ b/lldb/examples/python/x86_64_qemu_target_definition.py
@@ -738,7 +738,7 @@ def get_target_definition():
# info
if 'slice' not in reg_info and 'composite' not in reg_info:
reg_info['offset'] = offset
- offset += reg_info['bitsize'] / 8
+ offset += reg_info['bitsize'] // 8
# Set the GCC/DWARF register number for this register if it has one
reg_num = get_reg_num(name_to_gcc_dwarf_regnum, reg_name)
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